John Lillis

1.5k total citations
48 papers, 1.1k citations indexed

About

John Lillis is a scholar working on Electrical and Electronic Engineering, Hardware and Architecture and Computer Networks and Communications. According to data from OpenAlex, John Lillis has authored 48 papers receiving a total of 1.1k indexed citations (citations by other indexed papers that have themselves been cited), including 48 papers in Electrical and Electronic Engineering, 37 papers in Hardware and Architecture and 18 papers in Computer Networks and Communications. Recurrent topics in John Lillis's work include VLSI and FPGA Design Techniques (45 papers), Low-power high-performance VLSI design (33 papers) and VLSI and Analog Circuit Testing (24 papers). John Lillis is often cited by papers focused on VLSI and FPGA Design Techniques (45 papers), Low-power high-performance VLSI design (33 papers) and VLSI and Analog Circuit Testing (24 papers). John Lillis collaborates with scholars based in United States, Italy and Australia. John Lillis's co-authors include Chung‐Kuan Cheng, Tao Lin, Ting-Ting Y. Lin, Ching-Yen Ho, Shen Lin, Ashok Jagannathan, Chung-Kuan Cheng, Marco D. Santambrogio, Jianmin Li and Antonio Miele and has published in prestigious journals such as IEEE Journal of Solid-State Circuits, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems and IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

In The Last Decade

John Lillis

48 papers receiving 1.0k citations

Peers

John Lillis
Sarvesh Bhardwaj United States
Dennis J.-H. Huang United States
Rajeev Murgai United States
Jun Nakano United States
Kerim Kalafala United States
R. Rajsuman United States
B.D. McCredie United States
Sarvesh Bhardwaj United States
John Lillis
Citations per year, relative to John Lillis John Lillis (= 1×) peers Sarvesh Bhardwaj

Countries citing papers authored by John Lillis

Since Specialization
Citations

This map shows the geographic impact of John Lillis's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by John Lillis with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites John Lillis more than expected).

Fields of papers citing papers by John Lillis

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by John Lillis. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by John Lillis. The network helps show where John Lillis may publish in the future.

Co-authorship network of co-authors of John Lillis

This figure shows the co-authorship network connecting the top 25 collaborators of John Lillis. A scholar is included among the top collaborators of John Lillis based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with John Lillis. John Lillis is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
1.
Lillis, John, et al.. (2007). RBI: Simultaneous Placement and Routing Optimization Technique. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 26(1). 127–141. 6 indexed citations
2.
Lillis, John, et al.. (2006). Trunk decomposition based global routing optimization. Digest of technical papers/Digest of technical papers - IEEE/ACM International Conference on Computer-Aided Design. 472–472. 4 indexed citations
3.
Wang, Qingzhou, et al.. (2005). A study of tighter lower bounds in LP relaxation based placement. 10. 498–502. 4 indexed citations
4.
Lillis, John, Chung‐Kuan Cheng, Ting-Ting Y. Lin, & Ching-Yen Ho. (2005). New performance driven routing techniques with explicit area/delay tradeoff and simultaneous wire sizing. 395–400. 15 indexed citations
5.
Lillis, John, et al.. (2005). On interactions between routing and detailed placement. 387–393. 14 indexed citations
6.
Lillis, John, et al.. (2004). An approach to placement-coupled logic replication. 711–716. 26 indexed citations
7.
Lillis, John, et al.. (2003). Timing optimization of FPGA placements by logic replication. 196–201. 30 indexed citations
8.
Lillis, John, et al.. (2003). Timing optimization of FPGA placements by logic replication. 3 indexed citations
9.
Jagannathan, Ashok, et al.. (2002). A fast algorithm for context-aware buffer insertion. ACM Transactions on Design Automation of Electronic Systems. 7(1). 173–188. 5 indexed citations
10.
Lillis, John, Chung‐Kuan Cheng, & Ting-Ting Y. Lin. (2002). Simultaneous routing and buffer insertion for high performance interconnect. 148–153. 39 indexed citations
11.
Lillis, John, et al.. (2002). S-Tree: a technique for buffered routing tree synthesis. 578–583. 13 indexed citations
12.
Lillis, John, et al.. (2002). Mongrel: hybrid techniques for standard cell placement. 165–170. 13 indexed citations
13.
Lillis, John, et al.. (2000). Mongrel: hybrid techniques for standard cell placement. International Conference on Computer Aided Design. 165–170. 95 indexed citations
14.
Lillis, John, et al.. (2000). Relaxation and Clustering in a Local Search Framework: Application to Linear Placement. VLSI design. 14(2). 143–154. 5 indexed citations
15.
Jagannathan, Ashok, et al.. (2000). A fast algorithm for context-aware buffer insertion. 368–373. 18 indexed citations
16.
Lin, Shen & John Lillis. (1999). Interconnect Analysis and Synthesis. John Wiley & Sons, Inc. eBooks. 39 indexed citations
17.
Lillis, John, Chung‐Kuan Cheng, & Tao Lin. (1996). Optimal wire sizing and buffer insertion for low power and a generalized delay model. IEEE Journal of Solid-State Circuits. 31(3). 437–447. 192 indexed citations
18.
Lillis, John, Chung‐Kuan Cheng, Ting-Ting Y. Lin, & Ching-Yen Ho. (1996). New performance driven routing techniques with explicit area/delay tradeoff and simultaneous wire sizing. 395–400. 86 indexed citations
19.
Lillis, John, Chung‐Kuan Cheng, & Ting-Ting Y. Lin. (1995). Optimal wire sizing and buffer insertion for low power and a generalized delay model. International Conference on Computer Aided Design. 138–143. 81 indexed citations
20.
Li, Jianmin, John Lillis, & Chung‐Kuan Cheng. (1995). Linear decomposition algorithm for VLSI design applications. International Conference on Computer Aided Design. 223–228. 27 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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