Antonio Miele

1.5k citations

100 papers · 1.0k indexed · h-index 17

Impact in

Hardware and Architecture top 1%
- Parallel Computing and Optimization Techniques
- Embedded Systems Design Techniques
- VLSI and Analog Circuit Testing
- Real-Time Systems Scheduling
Computer Networks and Communications top 2%
- Interconnection Networks and Systems
- Distributed systems and fault tolerance

Papers in ⓘ

Hardware and Architecture 60
- Parallel Computing and Optimization Techniques 29
- Embedded Systems Design Techniques 25
- VLSI and Analog Circuit Testing 24
Computer Networks and Communications 41
- Interconnection Networks and Systems 15
- Distributed and Parallel Computing Systems 9

Co-authors: Cristiana Bolchini (63 shared papers)Marco D. Santambrogio (11 shared papers)Donatella Sciuto (10 shared papers)Luca Cassano (18 shared papers)Pasi Liljeberg (14 shared papers)Mohammad-Hashem Haghbayan (12 shared papers)Hannu Tenhunen (8 shared papers)Amir M. Rahmani (5 shared papers)
Journals: IEEE Transactions on Computers (7 papers)IEEE Transactions on Very Large Scale Integration (VLSI) Systems (2 papers)IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (2 papers)The Journal of Arthroplasty (1 paper)Performance Evaluation (1 paper)
Partner nations: Italy Finland United States

In The Last Decade

Antonio Miele

92 papers receiving 987 citations

Peers

Countries citing papers authored by Antonio Miele

Since Specialization

Citations

This map shows the geographic impact of Antonio Miele's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Antonio Miele with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Antonio Miele more than expected).

Fields of papers citing papers by Antonio Miele

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Antonio Miele. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Antonio Miele. The network helps show where Antonio Miele may publish in the future.

Co-authors

The 25 scholars most cited alongside Antonio Miele, linked wherever they have co-authored with each other. Click a name or a connecting line to browse the papers they share.

Border = papers with Antonio Miele Line = papers co-authored together Antonio Miele links everyone, so they are left out of the graph.

All Works

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20 of 20 papers shown

Showing the 20 most-cited of 100 papers — load more, or switch the sort, to bring in the rest.

#	Work
1	TMR and Partial Dynamic Reconfiguration to mitigate SEU faults in FPGAs Virtual Community of Pathological Anatomy (University of Castilla La Mancha) ·Cristiana Bolchini, Antonio Miele, Marco D. Santambrogio	2007	101
2	A Novel Design Methodology for Implementing Reliability-Aware Systems on SRAM-Based FPGAs IEEE Transactions on Computers ·Cristiana Bolchini, Antonio Miele, Chiara Sandionigi	2010	64
3	Reliability-Driven System-Level Synthesis for Mixed-Critical Embedded Systems IEEE Transactions on Computers ·Cristiana Bolchini, Antonio Miele	2012	61
4	Reliability-Aware Runtime Power Management for Many-Core Systems in the Dark Silicon Era IEEE Transactions on Very Large Scale Integration (VLSI) Systems ·Amir M. Rahmani, Mohammad-Hashem Haghbayan, Antonio Miele, Pasi Liljeberg, Axel Jantsch, Hannu Tenhunen	2016	42
5	Combined DVFS and mapping exploration for lifetime and soft-error susceptibility improvement in MPSoCs Design, Automation & Test in Europe Conference & Exhibition (DATE), 2014 ·Anup Das, Akash Kumar, B. Veeravalli, Cristiana Bolchini, Antonio Miele	2014	32
6	Run-time mapping for reliable many-cores based on energy/performance trade-offs National University of Singapore ·Cristiana Bolchini, Matteo Carminati, Antonio Miele, Anup Das, Akash Kumar, Bharadwaj Veeravalli	2013	32
7	Floorplanning Automation for Partial-Reconfigurable FPGAs via Feasible Placements Generation IEEE Transactions on Very Large Scale Integration (VLSI) Systems ·Marco Rabozzi, Gianluca Durelli, Antonio Miele, John Lillis, Marco D. Santambrogio	2016	29
8	A Lifetime-Aware Runtime Mapping Approach for Many-core Systems in the Dark Silicon Era Mohammad-Hashem Haghbayan, Antonio Miele, Amir M. Rahmani, Pasi Liljeberg, Hannu Tenhunen	2016	26
9	Workload-aware Power Optimization Strategy for Asymmetric Multiprocessors Emanuele Del Sozzo, Gianluca Durelli, Ettore M. G. Trainiti, Antonio Miele, Marco D. Santambrogio, Cristiana Bolchini	2016	26
10	Automated Resource-Aware Floorplanning of Reconfigurable Areas in Partially-Reconfigurable FPGA Systems Virtual Community of Pathological Anatomy (University of Castilla La Mancha) ·Cristiana Bolchini, Antonio Miele, Chiara Sandionigi	2011	24
11	Self-Adaptive Fault Tolerance in Multi-/Many-Core Systems Journal of Electronic Testing ·Cristiana Bolchini, Matteo Carminati, Antonio Miele	2013	21
12	Performance/Reliability-Aware Resource Management for Many-Cores in Dark Silicon Era IEEE Transactions on Computers ·Mohammad-Hashem Haghbayan, Antonio Miele, Amir M. Rahmani, Pasi Liljeberg, Hannu Tenhunen	2017	21
13	A methodology for preference-based personalization of contextual data Virtual Community of Pathological Anatomy (University of Castilla La Mancha) ·Antonio Miele, Elisa Quintarelli, Letizia Tanca	2009	21
14	A Neural Network Based Fault Management Scheme for Reliable Image Processing IEEE Transactions on Computers ·Matteo Biasielli, Cristiana Bolchini, Luca Cassano, Erdem Koyuncu, Antonio Miele	2020	17
15	A model of soft error effects in generic IP processors Virtual Community of Pathological Anatomy (University of Castilla La Mancha) ·Cristiana Bolchini, Antonio Miele, Fabio Salice, Donatella Sciuto	2006	17
16	A lightweight and open-source framework for the lifetime estimation of multicore systems Virtual Community of Pathological Anatomy (University of Castilla La Mancha) ·Cristiana Bolchini, Matteo Carminati, Marco Gribaudo, Antonio Miele	2014	17
17	Fast and Accurate Error Simulation for CNNs Against Soft Errors Virtual Community of Pathological Anatomy (University of Castilla La Mancha) ·Cristiana Bolchini, Luca Cassano, Antonio Miele, A. Toschi	2023	16
18	An adaptive approach for online fault management in many-core architectures Design, Automation, and Test in Europe ·Cristiana Bolchini, Antonio Miele, Donatella Sciuto	2012	16
19	ReSP: A non-intrusive Transaction-Level Reflective MPSoC Simulation Platform for design space exploration Virtual Community of Pathological Anatomy (University of Castilla La Mancha) ·Giovanni Beltrame, Cristiana Bolchini, L. Fossati, Antonio Miele, Donatella Sciuto	2008	16
20	An adaptive approach for online fault management in many-core architectures Cristiana Bolchini, Antonio Miele, Donatella Sciuto	2012	16

About Antonio Miele

Antonio Miele is a scholar working on Hardware and Architecture, Computer Networks and Communications, Electrical and Electronic Engineering, Software and Computer Vision and Pattern Recognition, having authored 100 papers that have together received 1.0k indexed citations. Recurring topics across this work include Radiation Effects in Electronics (42 papers), Parallel Computing and Optimization Techniques (29 papers), Embedded Systems Design Techniques (25 papers), VLSI and Analog Circuit Testing (24 papers), Interconnection Networks and Systems (15 papers), Low-power high-performance VLSI design (11 papers), Distributed and Parallel Computing Systems (9 papers) and Semiconductor materials and devices (9 papers). The work is most often cited by research in Hardware and Architecture (700 citations), Computer Networks and Communications (442 citations), Electrical and Electronic Engineering (672 citations), Software (41 citations) and Safety, Risk, Reliability and Quality (37 citations). Antonio Miele has collaborated with scholars based in Italy, Finland and United States. Frequent co-authors include Cristiana Bolchini, Marco D. Santambrogio, Donatella Sciuto, Luca Cassano, Pasi Liljeberg, Mohammad-Hashem Haghbayan, Hannu Tenhunen, Amir M. Rahmani, Akash Kumar and Anup Das. Their work appears in journals such as IEEE Transactions on Computers, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, The Journal of Arthroplasty and Performance Evaluation.

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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