Jiwoo Pak

971 total citations · 1 hit paper
14 papers, 521 citations indexed

About

Jiwoo Pak is a scholar working on Electrical and Electronic Engineering, Electronic, Optical and Magnetic Materials and Hardware and Architecture. According to data from OpenAlex, Jiwoo Pak has authored 14 papers receiving a total of 521 indexed citations (citations by other indexed papers that have themselves been cited), including 14 papers in Electrical and Electronic Engineering, 7 papers in Electronic, Optical and Magnetic Materials and 3 papers in Hardware and Architecture. Recurrent topics in Jiwoo Pak's work include 3D IC and TSV technologies (11 papers), Copper Interconnects and Reliability (7 papers) and Electronic Packaging and Soldering Technologies (7 papers). Jiwoo Pak is often cited by papers focused on 3D IC and TSV technologies (11 papers), Copper Interconnects and Reliability (7 papers) and Electronic Packaging and Soldering Technologies (7 papers). Jiwoo Pak collaborates with scholars based in United States and South Korea. Jiwoo Pak's co-authors include David Z. Pan, Sung Kyu Lim, Mohit Pathak, James Laudon, Azalia Mirhoseini, Young‐Joon Lee, Quoc V. Le, E. Tuncer, Eric N. Johnson and Joe Wenjie Jiang and has published in prestigious journals such as Nature, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems and International Conference on Computer Aided Design.

In The Last Decade

Jiwoo Pak

14 papers receiving 500 citations

Hit Papers

A graph placement methodology for fast chip design 2021 2026 2022 2024 2021 100 200 300
What are hit papers?

Hit papers significantly outperform the citation benchmark for their cohort. A paper qualifies if it has ≥500 total citations, achieves ≥1.5× the top-1% citation threshold for papers in the same subfield and year (this is the minimum needed to enter the top 1%, not the average within it), or reaches the top citation threshold in at least one of its specific research topics.

  1. A graph placement methodology for fast chip design
    2021 312 citations Azalia Mirhoseini, Anna Goldie et al. Nature profile →

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name h Career Trend Papers Cites
Jiwoo Pak United States 10 369 95 94 76 48 14 521
E. Tuncer United States 8 313 0.8× 96 1.0× 92 1.0× 13 0.2× 35 0.7× 25 469
Yitao Ma Japan 11 248 0.7× 37 0.4× 52 0.6× 28 0.4× 20 0.4× 36 396
Sujata Pandey India 12 324 0.9× 47 0.5× 35 0.4× 56 0.7× 91 1.9× 123 586
Guannan Guo United States 14 128 0.3× 183 1.9× 38 0.4× 37 0.5× 107 2.2× 27 404
Rasit Onur Topaloglu United States 17 509 1.4× 159 1.7× 137 1.5× 10 0.1× 42 0.9× 70 696
Charles Chiang United States 14 486 1.3× 167 1.8× 59 0.6× 15 0.2× 23 0.5× 40 599
Norman Chang United States 13 352 1.0× 134 1.4× 58 0.6× 26 0.3× 45 0.9× 71 493
Kai-Yuan Chao United States 15 690 1.9× 377 4.0× 41 0.4× 23 0.3× 177 3.7× 58 760
Takanori Isobe Japan 18 933 2.5× 51 0.5× 257 2.7× 28 0.4× 33 0.7× 210 1.2k
Zhipeng Zhao China 11 189 0.5× 62 0.7× 65 0.7× 31 0.4× 119 2.5× 27 432

Countries citing papers authored by Jiwoo Pak

Since Specialization
Citations

This map shows the geographic impact of Jiwoo Pak's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Jiwoo Pak with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Jiwoo Pak more than expected).

Fields of papers citing papers by Jiwoo Pak

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Jiwoo Pak. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Jiwoo Pak. The network helps show where Jiwoo Pak may publish in the future.

Co-authorship network of co-authors of Jiwoo Pak

This figure shows the co-authorship network connecting the top 25 collaborators of Jiwoo Pak. A scholar is included among the top collaborators of Jiwoo Pak based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Jiwoo Pak. Jiwoo Pak is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

14 of 14 papers shown
1.
Goldie, Anna, Azalia Mirhoseini, Mustafa Ege Yazgan, et al.. (2024). Addendum: A graph placement methodology for fast chip design. Nature. 634(8034). E10–E11. 3 indexed citations
2.
Mirhoseini, Azalia, Anna Goldie, Mustafa Ege Yazgan, et al.. (2021). A graph placement methodology for fast chip design. Nature. 594(7862). 207–212. 312 indexed citations breakdown →
3.
Pak, Jiwoo, Bei Yu, & David Z. Pan. (2015). Electromigration-aware redundant via insertion. 544–549. 11 indexed citations
4.
Pak, Jiwoo, Sung Kyu Lim, & David Z. Pan. (2014). Electromigration Study for Multiscale Power/Ground Vias in TSV-Based 3-D ICs. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 33(12). 1873–1885. 15 indexed citations
5.
Pak, Jiwoo, Sung Kyu Lim, & David Z. Pan. (2013). Electromigration study for multi-scale power/ground vias in TSV-based 3D ICs. International Conference on Computer Aided Design. 379–386. 9 indexed citations
6.
Pak, Jiwoo, Sung Kyu Lim, & David Z. Pan. (2013). Electromigration study for multi-scale power/ground vias in TSV-based 3D ICs. 379–386. 11 indexed citations
7.
Pak, Jiwoo, Sung Kyu Lim, & David Z. Pan. (2012). Electromigration-aware routing for 3D ICs with stress-aware EM modeling. 325–332. 10 indexed citations
8.
Pan, David Z., Sung Kyu Lim, Krit Athikulwongse, et al.. (2012). Design for manufacturability and reliability for TSV-based 3D ICs. 750–755. 24 indexed citations
9.
Yang, Jae-Seok, Jiwoo Pak, Xin Zhao, Sung Kyu Lim, & David Z. Pan. (2011). Robust clock tree synthesis with timing yield optimization for 3D-ICs. Asia and South Pacific Design Automation Conference. 621–626. 21 indexed citations
10.
Pak, Jiwoo, Mohit Pathak, Sung Kyu Lim, & David Z. Pan. (2011). Modeling of electromigration in through-silicon-via based 3D IC. 1420–1427. 50 indexed citations
11.
Yang, Jae-Seok, Jiwoo Pak, Xin Zhao, Sung Kyu Lim, & David Z. Pan. (2011). Robust Clock Tree Synthesis with timing yield optimization for 3D-ICs. 621–626. 18 indexed citations
12.
Pathak, Mohit, Jiwoo Pak, David Z. Pan, & Sung Kyu Lim. (2011). Electromigration modeling and full-chip reliability analysis for BEOL interconnect in TSV-based 3D ICs. 555–562. 29 indexed citations
13.
14.
Lee, Woojin, Jun So Pak, Jiwoo Pak, et al.. (2008). A frequency tunable resonant clock distribution scheme using bond-wire inductor. 24–26. 4 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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