M. Kinugawa

931 total citations
29 papers, 679 citations indexed

About

M. Kinugawa is a scholar working on Electrical and Electronic Engineering, Computer Networks and Communications and Hardware and Architecture. According to data from OpenAlex, M. Kinugawa has authored 29 papers receiving a total of 679 indexed citations (citations by other indexed papers that have themselves been cited), including 29 papers in Electrical and Electronic Engineering, 2 papers in Computer Networks and Communications and 2 papers in Hardware and Architecture. Recurrent topics in M. Kinugawa's work include Semiconductor materials and devices (24 papers), Advancements in Semiconductor Devices and Circuit Design (23 papers) and Integrated Circuits and Semiconductor Failure Analysis (6 papers). M. Kinugawa is often cited by papers focused on Semiconductor materials and devices (24 papers), Advancements in Semiconductor Devices and Circuit Design (23 papers) and Integrated Circuits and Semiconductor Failure Analysis (6 papers). M. Kinugawa collaborates with scholars based in Japan, United States and South Korea. M. Kinugawa's co-authors include M. Kakumu, T. Sakurai, S. Mita, S. Yoshioka, Masayuki Murota, Takeshi Fujita, Kojiro Suzuki, Fumihiko Sano, T. Nagamatsu and Tadahiro Kuroda and has published in prestigious journals such as IEEE Journal of Solid-State Circuits and IEEE Transactions on Electron Devices.

In The Last Decade

M. Kinugawa

25 papers receiving 626 citations

Peers

M. Kinugawa
M. Kakumu Japan
H. Sato Japan
Foster Dai United States
Parag Upadhyaya United States
Jungsoo Kim South Korea
M. Kakumu Japan
M. Kinugawa
Citations per year, relative to M. Kinugawa M. Kinugawa (= 1×) peers M. Kakumu

Countries citing papers authored by M. Kinugawa

Since Specialization
Citations

This map shows the geographic impact of M. Kinugawa's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by M. Kinugawa with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites M. Kinugawa more than expected).

Fields of papers citing papers by M. Kinugawa

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by M. Kinugawa. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by M. Kinugawa. The network helps show where M. Kinugawa may publish in the future.

Co-authorship network of co-authors of M. Kinugawa

This figure shows the co-authorship network connecting the top 25 collaborators of M. Kinugawa. A scholar is included among the top collaborators of M. Kinugawa based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with M. Kinugawa. M. Kinugawa is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
1.
Yoshitomi, T., T. Ohguro, E. Morifuji, et al.. (2003). High performance MIM capacitor for RF BiCMOS/CMOS LSIs. 133–136. 6 indexed citations
2.
Igarashi, Hideji, H. Oyamatsu, Masahito Kodera, et al.. (2002). Manufacturable and reliable fluorine-doped low-k interlayer dielectric process for high performance logic LSI. 84–85.
3.
Yamaguchi, Takuya, et al.. (2002). Nitrogen concentration optimization for down-scaled CMOSFET with N/sub 2/O-based oxynitride process. ed 41. 220–221. 1 indexed citations
4.
Ishimaru, K., et al.. (2002). Anomalous hot-carrier induced degradation in very narrow channel nMOSFETs with STI structure. 881–884. 15 indexed citations
6.
Kinugawa, M. & M. Kakumu. (2002). Cell technology directions for advanced MPUs and other memory-embedded logic devices. 37–40. 1 indexed citations
7.
Kinugawa, M., et al.. (2002). Crystallization technology for low voltage operated TFT. 843–846. 1 indexed citations
8.
Akasaka, Y., K. Nakajima, K. Suguro, et al.. (2002). W/WNx/poly-Si gate technology for future high speed deep submicron CMOS LSIs. 32. 497–500. 1 indexed citations
9.
Morifuji, E., H.S. Momose, T. Ohguro, et al.. (1999). Future perspective and scaling down roadmap for RF CMOS. 163–164. 76 indexed citations
10.
Ohguro, T., B. Evans, Hideo Mabuchi, et al.. (1999). Improvement of 1/f noise by using VHP (vertical high pressure) oxynitride gate insulator for deep-sub micron RF and analog CMOS. 119–120. 12 indexed citations
11.
Kinugawa, M., M. Kakumu, Takeshi Yoshida, et al.. (1990). TFT (thin film transistor) cell technology for 4 Mbit and more high density SRAMs. 23–24. 6 indexed citations
12.
Kakumu, M. & M. Kinugawa. (1990). Power-supply voltage impact on circuit performance for half and lower submicrometer CMOS LSI. IEEE Transactions on Electron Devices. 37(8). 1902–1908. 40 indexed citations
13.
Kakumu, M., Hiroaki Takeuchi, Takeshi Yoshida, et al.. (1990). A 1 mu A retention 4 Mb SRAM with a thin-film-transistor load cell. 128–129. 4 indexed citations
14.
Kakumu, M., M. Kinugawa, Hiroaki Takeuchi, et al.. (1990). A 4-Mb CMOS SRAM with a PMOS thin-film-transistor load cell. IEEE Journal of Solid-State Circuits. 25(5). 1082–1092. 11 indexed citations
16.
Matsuoka, F., et al.. (1990). DRAIN STRUCTURE OPTIMIZATION FOR HIGHLY RELIABLE DEEP SUBMICRON nMOSFETs WITH 3.3V HIGH PERFORMANCE OPERATION ON THE SCALING TREND. 2 indexed citations
17.
Nogami, K., T. Sakurai, K. Sawada, et al.. (1986). 1-Mbit virtually static RAM. IEEE Journal of Solid-State Circuits. 21(5). 662–669. 6 indexed citations
18.
Kakumu, M., M. Kinugawa, Koh Hashimoto, & J. Matsunaga. (1986). Power supply voltage for future CMOS VLSI in half and sub micrometer. 399–402. 8 indexed citations
19.
Sakurai, T., K. Sawada, K. Nogami, et al.. (1986). A 1Mb virtually SRAM. 252–253. 5 indexed citations
20.
Kinugawa, M., et al.. (1985). Effects of silicon surface orientation on submicron CMOS devices. 581–584. 14 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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