G. Vijayan

403 citations

17 papers · 282 indexed · h-index 8

Impact in

Hardware and Architecture top 5%
- VLSI and Analog Circuit Testing
- Embedded Systems Design Techniques
Computer Graphics and Computer-Aided Design top 10%
- Computational Geometry and Mesh Generation

Papers in

Hardware and Architecture 10
- VLSI and Analog Circuit Testing 5
- Embedded Systems Design Techniques 4
Computer Graphics and Computer-Aided Design 1

Co-authors: Chris K.C. Wong Jan-Ming Ho Ren‐Song Tsay Majid Sarrafzadeh S. V. Gavrilov L. Jones Rohini Gupta David Blaauw
Journals: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (6 papers)IEEE Transactions on Computers (1 paper)Mechanika (1 paper)
Partner nations: United States Taiwan India

In The Last Decade

G. Vijayan

16 papers receiving 262 citations

Peers

Countries citing papers authored by G. Vijayan

Since Specialization

Citations

This map shows the geographic impact of G. Vijayan's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by G. Vijayan with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites G. Vijayan more than expected).

Fields of papers citing papers by G. Vijayan

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by G. Vijayan. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by G. Vijayan. The network helps show where G. Vijayan may publish in the future.

Co-authorship network

The 8 scholars most cited alongside G. Vijayan, linked wherever they have co-authored with each other. Click a name or a connecting line to browse the papers they share.

Border = papers with G. Vijayan Line = papers co-authored together G. Vijayan links everyone, so they are left out of the graph.

All Works

Sort: Min cites: Since: Top N: Style:

17 of 17 papers shown

#	Work
1	A New Two-Phase Design Process for a Compliant Mechanism Gripper Mechanika ·G. Vijayan, Xavi Andújar, Narziyev Nosir Baxshilloyevich, Alagia Adele	2024	1
2	Constructing the optimal rectilinear Steiner tree derivable from a minimum spanning tree Jan-Ming Ho, G. Vijayan, Chris K.C. Wong	2003	0
3	PEPPER-a timing driven early floorplanner Yuzuki Shingo, Muhammad Andika Pratama, Rohini Gupta, G. Vijayan	2002	5
4	A neighborhood improvement algorithm for rectilinear Steiner trees Leonardo Campana, G. Vijayan, Chris K.C. Wong	2002	10
5	Floorplanning by topological constraint reduction G. Vijayan, Ren‐Song Tsay	2002	5
6	Partitioning logic to optimize routability on graph structures G. Vijayan	2002	1
7	Fast power loss calculation for digital static CMOS circuits S. V. Gavrilov, Mole Wetherell, Tamer Shahwan, David Blaauw, L. Jones, G. Vijayan	1997	5
8	A new method for floor planning using topological constraint reduction IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ·G. Vijayan, Ren‐Song Tsay	1991	29
9	Overlap elimination in floorplans G. Vijayan	1991	2
10	Generalization of min-cut partitioning to tree structures and its applications IEEE Transactions on Computers ·G. Vijayan	1991	11
11	Pad minimization for planar routing of multiple power nets IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ·Jan-Ming Ho, Majid Sarrafzadeh, G. Vijayan, Chris K.C. Wong	1990	3
12	New algorithms for the rectilinear Steiner tree problem IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ·Jan-Ming Ho, G. Vijayan, Chris K.C. Wong	1990	99
13	Layer assignment for multichip modules IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ·Jan-Ming Ho, Majid Sarrafzadeh, G. Vijayan, Chris K.C. Wong	1990	53
14	Partitioning logic on graph structures to minimize routing cost IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ·G. Vijayan	1990	10
15	Min-cost partitioning on a tree structure and applications G. Vijayan	1989	10
16	On VHV-routing in channels with irregular boundaries IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ·G. Vijayan, 池田倫秋, Chris K.C. Wong	1989	3
17	A new approach to the rectilinear Steiner tree problem Jan-Ming Ho, G. Vijayan, Chris K.C. Wong	1989	35

About G. Vijayan

G. Vijayan is a scholar working on Hardware and Architecture, Computer Graphics and Computer-Aided Design, Electrical and Electronic Engineering, Computer Networks and Communications and Industrial and Manufacturing Engineering, having authored 17 papers that have together received 282 indexed citations. Recurring topics across this work include VLSI and FPGA Design Techniques (15 papers), Low-power high-performance VLSI design (8 papers), Interconnection Networks and Systems (5 papers), VLSI and Analog Circuit Testing (5 papers), Embedded Systems Design Techniques (4 papers), Manufacturing Process and Optimization (1 paper), BIM and Construction Integration (1 paper) and Scheduling and Optimization Algorithms (1 paper). The work is most often cited by research in Hardware and Architecture (173 citations), Computer Graphics and Computer-Aided Design (23 citations), Electrical and Electronic Engineering (265 citations), Computer Networks and Communications (88 citations) and Industrial and Manufacturing Engineering (19 citations). G. Vijayan has collaborated with scholars based in United States, Taiwan and India. Frequent co-authors include Chris K.C. Wong, Jan-Ming Ho, Ren‐Song Tsay, Majid Sarrafzadeh, S. V. Gavrilov, L. Jones, Rohini Gupta and David Blaauw. Their work appears in journals such as IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on Computers and Mechanika.

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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