Tianming Kong

501 total citations
10 papers, 357 citations indexed

About

Tianming Kong is a scholar working on Electrical and Electronic Engineering, Hardware and Architecture and Industrial and Manufacturing Engineering. According to data from OpenAlex, Tianming Kong has authored 10 papers receiving a total of 357 indexed citations (citations by other indexed papers that have themselves been cited), including 10 papers in Electrical and Electronic Engineering, 6 papers in Hardware and Architecture and 4 papers in Industrial and Manufacturing Engineering. Recurrent topics in Tianming Kong's work include VLSI and FPGA Design Techniques (10 papers), Low-power high-performance VLSI design (6 papers) and VLSI and Analog Circuit Testing (6 papers). Tianming Kong is often cited by papers focused on VLSI and FPGA Design Techniques (10 papers), Low-power high-performance VLSI design (6 papers) and VLSI and Analog Circuit Testing (6 papers). Tianming Kong collaborates with scholars based in United States and China. Tianming Kong's co-authors include David Z. Pan, Jason Cong, Tony F. Chan, Joseph R. Shinnerl, J. Cong, Jason Cong, Faming Liang, Jun S. Liu and Wing Hung Wong and has published in prestigious journals such as IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Rare & Special e-Zone (The Hong Kong University of Science and Technology) and Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE.

In The Last Decade

Tianming Kong

9 papers receiving 347 citations

Peers

Tianming Kong
M.A.B. Jackson United States
Michail Romesis United States
K. Chaudhary United States
Maogang Wang United States
Kenton Sze United States
Arvind Srinivasan United States
S.K. Goel Netherlands
S. Shoukourian Switzerland
Bangqi Xu United States
M.A.B. Jackson United States
Tianming Kong
Citations per year, relative to Tianming Kong Tianming Kong (= 1×) peers M.A.B. Jackson

Countries citing papers authored by Tianming Kong

Since Specialization
Citations

This map shows the geographic impact of Tianming Kong's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Tianming Kong with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Tianming Kong more than expected).

Fields of papers citing papers by Tianming Kong

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Tianming Kong. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Tianming Kong. The network helps show where Tianming Kong may publish in the future.

Co-authorship network of co-authors of Tianming Kong

This figure shows the co-authorship network connecting the top 25 collaborators of Tianming Kong. A scholar is included among the top collaborators of Tianming Kong based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Tianming Kong. Tianming Kong is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

10 of 10 papers shown
1.
Cong, J., Tianming Kong, & David Z. Pan. (2003). Buffer block planning for interconnect-driven floorplanning. 358–363. 56 indexed citations
2.
Kong, Tianming, et al.. (2002). VEAP: Global optimization based efficient algorithm for VLSI placement. iccad 87. 277–280. 1 indexed citations
4.
Chan, Tony F., Jason Cong, Tianming Kong, & Joseph R. Shinnerl. (2002). Multilevel optimization for large-scale circuit placement. Rare & Special e-Zone (The Hong Kong University of Science and Technology). 171–176. 57 indexed citations
5.
Cong, J., et al.. (2001). Buffer block planning for interconnect planning and prediction. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 9(6). 929–937. 20 indexed citations
6.
Chan, Tony F., Jason Cong, Tianming Kong, & Joseph R. Shinnerl. (2000). Multilevel optimization for large-scale circuit placement. 171–176. 93 indexed citations
7.
Cong, Jason, et al.. (2000). Dynamic weighting Monte Carlo for constrained floorplan designs in mixed signal application. 277–282. 2 indexed citations
8.
Cong, Jason, Tianming Kong, & David Z. Pan. (1999). Buffer block planning for interconnect-driven floorplanning. 358–363. 110 indexed citations
9.
Cong, Jason, et al.. (1999). Relaxed simulated tempering for VLSI floorplan designs. 13–16 vol.1. 14 indexed citations
10.
Kong, Tianming, et al.. (1996). <title>Timing-driven floor-planning algorithm for building block layout</title>. Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE. 2644. 477–482. 4 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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