G. Saucier
Impact in
- Hardware and Architecture top 2%
- VLSI and Analog Circuit Testing
- Embedded Systems Design Techniques
- Parallel Computing and Optimization Techniques
-
- Formal Methods in Verification
Papers in
-
- VLSI and Analog Circuit Testing 28
- Embedded Systems Design Techniques 27
- Parallel Computing and Optimization Techniques 7
- Software 6
- Journals
- IEEE Transactions on Computers (6 papers)IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (4 papers)IEEE Transactions on Very Large Scale Integration (VLSI) Systems (2 papers)IEEE Journal of Solid-State Circuits (1 paper)Computer (1 paper)
- Partner nations
- FranceUnited StatesBelgium
In The Last Decade
G. Saucier
67 papers receiving 479 citations
Peers
Comparison fields: 5 of 32
- Hardware and Architecture 438
- Computational Theory and Mathematics 144
- Software 29
- Electrical and Electronic Engineering 402
- Computer Networks and Communications 101
Countries citing papers authored by G. Saucier
This map shows the geographic impact of G. Saucier's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by G. Saucier with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites G. Saucier more than expected).
Fields of papers citing papers by G. Saucier
This network shows the impact of papers produced by G. Saucier. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by G. Saucier. The network helps show where G. Saucier may publish in the future.
Co-authorship network
The 17 scholars most cited alongside G. Saucier, linked wherever they have co-authored with each other. Click a name or a connecting line to browse the papers they share.
All Works
| # | Work | ||
|---|---|---|---|
| 1 | 2003 | 1 | |
| 2 | 2003 | 4 | |
| 3 | 2002 | 3 | |
| 4 | 2002 | 1 | |
| 5 | 2002 | 7 | |
| 6 | 2002 | 1 | |
| 7 | 2002 | 14 | |
| 8 | 2002 | 11 | |
| 9 | 1995 | 0 | |
| 10 | Design of a dedicated neural network on silicon: application to optical character recognition | 1993 | 1 |
| 11 | Synthesis for control dominated circuits : selected papers from the IFIP WG10.2/WG10.5 workshops, Grenoble, France, April and September 1992 | 1993 | 1 |
| 12 | 1993 | 16 | |
| 13 | Synthesis on Multiplexer-Based F.P.G.A. Using Binary Decision Diagrams | 1992 | 3 |
| 14 | 1992 | 2 | |
| 15 | A Customizable Neural Processor for Distributed Neural Network. | 1991 | 2 |
| 16 | 1990 | 31 | |
| 17 | 1986 | 1 | |
| 18 | Wafer scale integration : proceedings of the IFIP WG 10.5 Workshop on Wafer Scale Integration, Grenoble, France, 17-19 March 1986 | 1986 | 1 |
| 19 | The IFIP WG 10.5 Workshop on wafer scale integration on Wafer scale integration | 1986 | 1 |
| 20 | CADOC: a system for computed aided functional test | 1984 | 1 |
About G. Saucier
G. Saucier is a scholar working on Hardware and Architecture, Software, Computational Theory and Mathematics, Electrical and Electronic Engineering and Computer Networks and Communications, having authored 79 papers that have together received 575 indexed citations. Recurring topics across this work include VLSI and Analog Circuit Testing (28 papers), Embedded Systems Design Techniques (27 papers), VLSI and FPGA Design Techniques (24 papers), Formal Methods in Verification (18 papers), Low-power high-performance VLSI design (14 papers), Interconnection Networks and Systems (11 papers), Parallel Computing and Optimization Techniques (7 papers) and 3D IC and TSV technologies (7 papers). The work is most often cited by research in Hardware and Architecture (438 citations), Computational Theory and Mathematics (144 citations), Software (29 citations), Electrical and Electronic Engineering (402 citations) and Computer Networks and Communications (101 citations). G. Saucier has collaborated with scholars based in France, United States and Belgium. Frequent co-authors include R. Leveugle, D. Brasen, C.H. Stapper, V.K. Jain, C. Robach, Jean-Luc Patry, Zahava Koren, Norbert Wehn, Israel Koren and Thierry Besson. Their work appears in journals such as IEEE Transactions on Computers, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, IEEE Journal of Solid-State Circuits and Computer.
Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.