Srivaths Ravi

613 citations

43 papers · 419 indexed · h-index 11

Impact in

Hardware and Architecture top 2%
- VLSI and Analog Circuit Testing
- Embedded Systems Design Techniques
- Parallel Computing and Optimization Techniques
Software top 10%

Papers in

Hardware and Architecture 36
- VLSI and Analog Circuit Testing 28
- Embedded Systems Design Techniques 11
- Parallel Computing and Optimization Techniques 7
Software 3

Co-authors: Anand Raghunathan Niraj K. Jha Sujit Dey Li Chen Madhav Marathe Xin He S. Chakravarty Degang Chen
Journals: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (6 papers)IEEE Transactions on Very Large Scale Integration (VLSI) Systems (2 papers)SIAM Journal on Computing (1 paper)IEEE Transactions on Computers (1 paper)IEEE Transactions on Instrumentation and Measurement (1 paper)
Partner nations: United States India Japan

In The Last Decade

Srivaths Ravi

39 papers receiving 403 citations

Peers

Countries citing papers authored by Srivaths Ravi

Since Specialization

Citations

This map shows the geographic impact of Srivaths Ravi's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Srivaths Ravi with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Srivaths Ravi more than expected).

Fields of papers citing papers by Srivaths Ravi

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Srivaths Ravi. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Srivaths Ravi. The network helps show where Srivaths Ravi may publish in the future.

Co-authorship network

The 25 scholars most cited alongside Srivaths Ravi, linked wherever they have co-authored with each other. Click a name or a connecting line to browse the papers they share.

Border = papers with Srivaths Ravi Line = papers co-authored together Srivaths Ravi links everyone, so they are left out of the graph.

All Works

Sort: Min cites: Since: Top N: Style:

20 of 20 papers shown

#	Work
1	A Weighted-Bin Difference Method for Issue Site Identification in Analog and Mixed-Signal Multi-Site Testing Journal of Electronic Testing ·Amit Datir, I Negru, 栄司安達, 김인태, Srivaths Ravi, Degang Chen	2023	0
2	Optimal Order Polynomial Transformation for Calibrating Systematic Errors in Multisite Testing I Negru, Amit Datir, 栄司安達, 김인태, Srivaths Ravi, Degang Chen	2022	1
3	Cross-Correlation Approach to Detecting Issue Test Sites in Massive Parallel Testing I Negru, Amit Datir, 栄司安達, 김인태, Srivaths Ravi, Degang Chen	2022	0
4	The Least-Squares Approach to Systematic Error Identification and Calibration in Semiconductor Multisite Testing I Negru, Amit Datir, 栄司安達, 김인태, Srivaths Ravi, Degang Chen	2022	5
5	A Polynomial Transform Method for Hardware Systematic Error Identification and Correction in Semiconductor Multi-Site Testing Journal of Electronic Testing ·I Negru, Amit Datir, 栄司安達, 김인태, Srivaths Ravi, Degang Chen	2022	0
6	On-site Detection and Mitigation of Potential Induced Degradation at Photovoltaic Power Plants – Case Study Academia Letters ·Yiye, Cong Phuong Nguyen, Srivaths Ravi	2021	1
7	Design Techniques with Multiple Scan Compression CoDecs for Low Power and High Quality Scan Test Journal of Low Power Electronics ·Arvind Jain, Niky Silvia Ruhma Dewi, Rubin Parekhji, Srivaths Ravi	2011	0
8	Multi-CoDec Configurations for Low Power and High Quality Scan Test Arvind Jain, Sushil Subramanian, Rubin Parekhji, Srivaths Ravi	2011	4
9	Methodology for early and accurate test power estimation at RTL J. Ye, Belle Taylor-McGhee, Srivaths Ravi, Maryam Rastegarpanah	2010	1
10	Methodology for low power test pattern generation using activity threshold control logic International Conference on Computer Aided Design ·Srivaths Ravi, MUHAMMET KIZILGEÇİT, Rubin Parekhji	2007	12
11	Power-aware test: Challenges and solutions Srivaths Ravi	2007	82
12	Exploring Software Partitions for Fast Security Processing on a Multiprocessor Mobile SoC IEEE Transactions on Very Large Scale Integration (VLSI) Systems ·Farid Muhtar Fathir, Anand Raghunathan, Srivaths Ravi, Eve Nettleship, Niraj K. Jha, Srimat Chakradhar	2007	2
13	Test-Volume Reduction in Systems-on-a-Chip Using Heterogeneous and Multilevel Compression Techniques IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ·张德祥, Srivaths Ravi, Anand Raghunathan, Niraj K. Jha, Srimat Chakradhar	2006	12
14	Use of Computation-Unit Integrated Memories in High-Level Synthesis IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ·Chao Huang, Srivaths Ravi, Anand Raghunathan, Niraj K. Jha	2006	2
15	Eliminating memory bottlenecks for a JPEG encoder through distributed logic-memory architecture and computation-unit integrated memory Chao Huang, Srivaths Ravi, Anand Raghunathan, Niraj K. Jha	2006	3
16	Heterogeneous and multi-level compression techniques for test volume reduction in systems-on-chip F Dondo, Srivaths Ravi, Anand Raghunathan, Niraj K. Jha, Srimat Chakradhar	2005	1
17	Energy Estimation for Extensible Processors Design, Automation, and Test in Europe ·Yunsi Fei, Srivaths Ravi, Anand Raghunathan, Niraj K. Jha	2003	5
18	On optimizing nMOS and dynamic CMOS functional cells S. Chakravarty, Xin He, Srivaths Ravi	2002	3
19	High-level synthesis of distributed logic-memory architectures Digest of technical papers/Digest of technical papers - IEEE/ACM International Conference on Computer-Aided Design ·Chao Huang, Srivaths Ravi, Anand Raghunathan, Niraj K. Jha	2002	7
20	The Complexity of Near-Optimal Programmable Logic Array Folding SIAM Journal on Computing ·Srivaths Ravi, Errol L. Lloyd	1988	11

About Srivaths Ravi

Srivaths Ravi is a scholar working on Hardware and Architecture, Software, Electrical and Electronic Engineering, Computer Networks and Communications and Computational Theory and Mathematics, having authored 43 papers that have together received 419 indexed citations. Recurring topics across this work include VLSI and Analog Circuit Testing (28 papers), Integrated Circuits and Semiconductor Failure Analysis (22 papers), Embedded Systems Design Techniques (11 papers), VLSI and FPGA Design Techniques (8 papers), Interconnection Networks and Systems (7 papers), Parallel Computing and Optimization Techniques (7 papers), Radiation Effects in Electronics (4 papers) and Engineering and Test Systems (4 papers). The work is most often cited by research in Hardware and Architecture (334 citations), Software (40 citations), Electrical and Electronic Engineering (296 citations), Computer Networks and Communications (75 citations) and Computational Theory and Mathematics (47 citations). Srivaths Ravi has collaborated with scholars based in United States, India and Japan. Frequent co-authors include Anand Raghunathan, Niraj K. Jha, Sujit Dey, Li Chen, Madhav Marathe, Xin He, S. Chakravarty, Degang Chen, Rubin Parekhji and Chao Huang. Their work appears in journals such as IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, SIAM Journal on Computing, IEEE Transactions on Computers and IEEE Transactions on Instrumentation and Measurement.

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

Explore authors with similar magnitude of impact