Dunshan Yu

691 total citations
90 papers, 472 citations indexed

About

Dunshan Yu is a scholar working on Electrical and Electronic Engineering, Signal Processing and Hardware and Architecture. According to data from OpenAlex, Dunshan Yu has authored 90 papers receiving a total of 472 indexed citations (citations by other indexed papers that have themselves been cited), including 58 papers in Electrical and Electronic Engineering, 17 papers in Signal Processing and 16 papers in Hardware and Architecture. Recurrent topics in Dunshan Yu's work include Advancements in PLL and VCO Technologies (14 papers), Advanced Memory and Neural Computing (13 papers) and Advancements in Semiconductor Devices and Circuit Design (10 papers). Dunshan Yu is often cited by papers focused on Advancements in PLL and VCO Technologies (14 papers), Advanced Memory and Neural Computing (13 papers) and Advancements in Semiconductor Devices and Circuit Design (10 papers). Dunshan Yu collaborates with scholars based in China, United States and Spain. Dunshan Yu's co-authors include Xiaoxin Cui, Jinlong Lin, Yuxuan Zhao, Weijun Lu, Kai Liao, Yuan Wang, Xiaole Cui, Kaisheng Ma, Kefei Liu and Xing Zhang and has published in prestigious journals such as IEEE Transactions on Industrial Electronics, Applied Surface Science and Electronics Letters.

In The Last Decade

Dunshan Yu

79 papers receiving 442 citations

Peers

Countries citing papers authored by Dunshan Yu

Since Specialization

Citations

This map shows the geographic impact of Dunshan Yu's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Dunshan Yu with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Dunshan Yu more than expected).

Fields of papers citing papers by Dunshan Yu

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Dunshan Yu. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Dunshan Yu. The network helps show where Dunshan Yu may publish in the future.

Co-authorship network of co-authors of Dunshan Yu

This figure shows the co-authorship network connecting the top 25 collaborators of Dunshan Yu. A scholar is included among the top collaborators of Dunshan Yu based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Dunshan Yu. Dunshan Yu is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

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20 of 20 papers shown

#	Work	Indexed citations
1	A 64Gb/s/wire 10.5Tb/s/mm/Layer Single-Ended Simultaneous Bi-Directional Transceiver with Echo and Crosstalk Cancellation for a Die-to-Die Interface in 28nm CMOS 2025 ·Zhifei Wang, Zhiwen Huang, (unknown), (unknown), (unknown), (unknown), Dunshan Yu, (unknown)	3
2	A 1.11pJ/b 224Gb/s XSR Receiver with Slice-Based CTLE and PI-Based Clock Generator in 12nm CMOS 2025 ·(unknown), (unknown), (unknown), Zhiwen Huang, Lei Shen, Boyang Zhang, Dunshan Yu, Yandong He, (unknown)	0
3	Towards Effective and Sparse Adversarial Attack on Spiking Neural Networks via Breaking Invisible Surrogate Gradients 2025 ·Lun Li, (unknown), Qin Ni, Ling Liang, Yuan Wang, (unknown), Dunshan Yu, Xiaoxin Cui	0
4	A van der Waals ferroelectric switchable diode with ultra-high nonlinearity factor 2025 ·Applied Surface Science ·(unknown), Jiahao Yan, (unknown), Yuehui Wang, (unknown), (unknown), Dunshan Yu, Kechao Tang, Junchen Dong, Dedong Han, Xing Zhang	0
5	An Energy-Efficient Differential Frame Convolutional Accelerator with on-Chip Fusion Storage Architecture and Pixel-Level Pipeline Data Flow 2024 ·Zhenhui Dai, Jiawei Wang, Yi Zhong, (unknown), Cheng Zhao, (unknown), (unknown), Yuan Wang, Dunshan Yu, Xiaoxin Cui	1
6	An Efficient Spiking Convolutional Architecture with Compressed Address Event Representation and Adaptive Delay Asynchronous Clocks 2024 ·Zhenhui Dai, Lun Li, Zilin Wang, J. Wang, (unknown), Yuan Wang, Dunshan Yu, Xiaoxin Cui	0
7	A multichannel readout integrated circuit with column-wise pseudo differential extended counting ADCs for an uncooled infrared focal plane array based on silicon diodes 2023 ·Microelectronics Journal ·Ye Zhou, Wengao Lu, (unknown), Dunshan Yu, Yacong Zhang, Zhongjian Chen	2
8	A 64K-Neuron 64M-1b-Synapse 2.64pJ/SOP Neuromorphic Chip With All Memory on Chip for Spike-Based Models in 65nm CMOS 2021 ·IEEE Transactions on Circuits & Systems II Express Briefs ·(unknown), Xiaoxin Cui, Yi Zhong, Kefei Liu, (unknown), Zhenhui Dai, Yuan Wang, Dunshan Yu, Ru Huang	43
9	A 28-nm 0.34-pJ/SOP Spike-Based Neuromorphic Processor for Efficient Artificial Neural Network Implementations 2021 ·(unknown), Xiaoxin Cui, Yi Zhong, Kefei Liu, (unknown), Zhenhui Dai, Dunshan Yu, Yuan Wang, Ru Huang	6
10	A 3D Convolutional Neural Network for Emotion Recognition based on EEG Signals 2020 ·Yuxuan Zhao, (unknown), Jinlong Lin, Dunshan Yu, (unknown)	29
11	A 108fs_rms 0.45mW 100MS/s 1.25MHz bandwidth multi-bit ΔΣ time-to-digital converter with dynamic element matching 2018 ·(unknown), (unknown), (unknown), Linqi Shi, Hongfei Ye, Weixin Gai, Dunshan Yu	1
12	High-Performance Noninvasive Side-Channel Attack Resistant ECC Coprocessor for GF(2m ) 2016 ·IEEE Transactions on Industrial Electronics ·Kai Liao, Xiaoxin Cui, (unknown), Tian Wang, Dunshan Yu, Xiaole Cui	8
13	Efficient Weak Signals Acquisition Strategy for GNSS Receivers 2015 ·IEICE Transactions on Communications ·Weijun Lu, (unknown), Dengyun Lei, Dunshan Yu	5
14	Balance Differential Coherent Bit Synchronization Algorithm for GNSS Receiver 2015 ·IEICE Transactions on Communications ·Dengyun Lei, Weijun Lu, (unknown), Dunshan Yu	1
15	Effective PPS Signal Generation with Predictive Synchronous Loop for GPS 2014 ·IEICE Transactions on Communications ·Yanbin Zhang, Weijun Lu, Dengyun Lei, (unknown), Dunshan Yu	2
16	A novel NAND Flash memory controller compatible with asynchronous and source synchronous data types 2012 ·(unknown), Jian Cao, Xing Zhang, Dunshan Yu	1
17	Design and implementation of an optimized FIR filter for IF GPS signal simulator 2010 ·(unknown), (unknown), Jie Huang, Dunshan Yu	3
18	Signal acquisition and tracking for software GPS receivers 2009 ·(unknown), (unknown), Dunshan Yu	7
19	A CORDIC Demodulator Platform for Digital-IF Receiver 2006 ·Xiaoxin Cui, Dunshan Yu, (unknown), Xiaole Cui	1
20	An Itra-high Speed Real-time T Processor 2006 ·(unknown), Dunshan Yu, (unknown)	1

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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