Xiaoxin Cui

917 total citations
134 papers, 577 citations indexed

About

Xiaoxin Cui is a scholar working on Electrical and Electronic Engineering, Artificial Intelligence and Hardware and Architecture. According to data from OpenAlex, Xiaoxin Cui has authored 134 papers receiving a total of 577 indexed citations (citations by other indexed papers that have themselves been cited), including 109 papers in Electrical and Electronic Engineering, 37 papers in Artificial Intelligence and 29 papers in Hardware and Architecture. Recurrent topics in Xiaoxin Cui's work include Advanced Memory and Neural Computing (73 papers), Ferroelectric and Negative Capacitance Devices (46 papers) and Physical Unclonable Functions (PUFs) and Hardware Security (22 papers). Xiaoxin Cui is often cited by papers focused on Advanced Memory and Neural Computing (73 papers), Ferroelectric and Negative Capacitance Devices (46 papers) and Physical Unclonable Functions (PUFs) and Hardware Security (22 papers). Xiaoxin Cui collaborates with scholars based in China, United States and Singapore. Xiaoxin Cui's co-authors include Xiaole Cui, Dunshan Yu, Yuan Wang, Kefei Liu, Ru Huang, Kai Liao, Xin’an Wang, Yi Zhong, Kaisheng Ma and Zhenhui Dai and has published in prestigious journals such as SHILAP Revista de lepidopterología, IEEE Transactions on Industrial Electronics and IEEE Access.

In The Last Decade

Xiaoxin Cui

118 papers receiving 561 citations

Author Peers

Peers are selected by citation overlap in the author's most active subfields. citations · hero ref

Author Last Decade Papers Cites
Xiaoxin Cui 473 134 106 87 78 134 577
Richard Linderman 387 0.8× 132 1.0× 74 0.7× 158 1.8× 95 1.2× 43 574
Anh Tuan 506 1.1× 73 0.5× 163 1.5× 119 1.4× 90 1.2× 78 652
Shuangchen Li 573 1.2× 119 0.9× 156 1.5× 73 0.8× 49 0.6× 25 682
Phil Knag 590 1.2× 192 1.4× 109 1.0× 130 1.5× 134 1.7× 27 703
Bo Marr 438 0.9× 158 1.2× 72 0.7× 90 1.0× 92 1.2× 11 490
H. Ekin Sumbul 346 0.7× 118 0.9× 184 1.7× 65 0.7× 67 0.9× 24 522
Gregory K. Chen 647 1.4× 132 1.0× 313 3.0× 162 1.9× 83 1.1× 22 723
Tobias Gemmeke 338 0.7× 100 0.7× 88 0.8× 42 0.5× 41 0.5× 70 517
Dhireesha Kudithipudi 625 1.3× 332 2.5× 74 0.7× 132 1.5× 202 2.6× 88 732

Countries citing papers authored by Xiaoxin Cui

Since Specialization
Citations

This map shows the geographic impact of Xiaoxin Cui's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Xiaoxin Cui with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Xiaoxin Cui more than expected).

Fields of papers citing papers by Xiaoxin Cui

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Xiaoxin Cui. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Xiaoxin Cui. The network helps show where Xiaoxin Cui may publish in the future.

Co-authorship network of co-authors of Xiaoxin Cui

This figure shows the co-authorship network connecting the top 25 collaborators of Xiaoxin Cui. A scholar is included among the top collaborators of Xiaoxin Cui based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Xiaoxin Cui. Xiaoxin Cui is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
1.
Cui, Xiaole, et al.. (2025). A VC Dimension-Oriented Improvement Method of PUFs for the Anti-Modeling-Attack Capability. ACM Transactions on Embedded Computing Systems. 24(5). 1–30.
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Cui, Xiaole, et al.. (2024). Design of Highly Reliable 14T and 16T SRAM Cells Combined With Layout Harden Technique. IEEE Transactions on Device and Materials Reliability. 24(3). 390–400. 1 indexed citations
5.
Li, Lun, et al.. (2024). NeuroREC: A 28-nm Efficient Neuromorphic Processor for Radar Emitter Classification. IEEE Transactions on Circuits and Systems I Regular Papers. 71(12). 6215–6228.
6.
Wang, Zilin, et al.. (2024). A Hybrid Heterogeneous Neural Network Accelerator based on Systolic Array. 154–158. 1 indexed citations
7.
Cui, Xiaole, et al.. (2024). The area-efficient gate level information flow tracking schemes of digital circuit with multi-level security lattice. Microelectronics Journal. 144. 106088–106088. 1 indexed citations
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Cui, Xiaole, Xiaole Cui, Wei Feng, et al.. (2024). A reconfigurable FPGA-based spiking neural network accelerator. Microelectronics Journal. 152. 106377–106377. 1 indexed citations
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Cui, Xiaoxin, et al.. (2024). An all integer-based spiking neural network with dynamic threshold adaptation. Frontiers in Neuroscience. 18. 1449020–1449020. 2 indexed citations
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Cui, Xiaole, et al.. (2023). An Evaluation Method of the Anti-Modeling-Attack Capability of PUFs. IEEE Transactions on Information Forensics and Security. 18. 1773–1788. 6 indexed citations
13.
Cui, Xiaoxin, et al.. (2023). Toward a Lossless Conversion for Spiking Neural Networks with Negative‐Spike Dynamics. SHILAP Revista de lepidopterología. 5(12). 1 indexed citations
14.
Guo, Qingyu, et al.. (2022). A 4-bit Integer-Only Neural Network Quantization Method Based on Shift Batch Normalization. 2022 IEEE International Symposium on Circuits and Systems (ISCAS). 707–711. 3 indexed citations
15.
Huang, Huixian, et al.. (2022). An obfuscation scheme of scan chain to protect the cryptographic chips. 19–24. 2 indexed citations
16.
Cui, Xiaoxin, Yi Zhong, Kefei Liu, et al.. (2021). A 64K-Neuron 64M-1b-Synapse 2.64pJ/SOP Neuromorphic Chip With All Memory on Chip for Spike-Based Models in 65nm CMOS. IEEE Transactions on Circuits & Systems II Express Briefs. 68(7). 2655–2659. 43 indexed citations
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Cui, Xiaoxin, Yi Zhong, Kefei Liu, et al.. (2021). A 28-nm 0.34-pJ/SOP Spike-Based Neuromorphic Processor for Efficient Artificial Neural Network Implementations. 1–5. 6 indexed citations
19.
Cui, Xiaole, et al.. (2020). The Synthesis Method of Logic Circuits Based on the NMOS-Like RRAM Gates. IEEE Access. 9. 54466–54477. 8 indexed citations
20.
Liu, Kefei, Xiaoxin Cui, Yi Zhong, et al.. (2019). A Hardware Implementation of SNN-Based Spatio-Temporal Memory Model. Frontiers in Neuroscience. 13. 835–835. 13 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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