Sergei Devadze

425 total citations
54 papers, 317 citations indexed

About

Sergei Devadze is a scholar working on Hardware and Architecture, Electrical and Electronic Engineering and Control and Systems Engineering. According to data from OpenAlex, Sergei Devadze has authored 54 papers receiving a total of 317 indexed citations (citations by other indexed papers that have themselves been cited), including 52 papers in Hardware and Architecture, 44 papers in Electrical and Electronic Engineering and 12 papers in Control and Systems Engineering. Recurrent topics in Sergei Devadze's work include VLSI and Analog Circuit Testing (47 papers), Integrated Circuits and Semiconductor Failure Analysis (28 papers) and Radiation Effects in Electronics (22 papers). Sergei Devadze is often cited by papers focused on VLSI and Analog Circuit Testing (47 papers), Integrated Circuits and Semiconductor Failure Analysis (28 papers) and Radiation Effects in Electronics (22 papers). Sergei Devadze collaborates with scholars based in Estonia, Germany and Sweden. Sergei Devadze's co-authors include Artur Jutman, Raimund Ubar, Jaan Raik, Erik Larsson, Riccardo Cantoro, M. Sonza Reorda, Maksim Jenihhin, Tom Wenzel, Peeter Ellervee and Gert Jervan and has published in prestigious journals such as Microprocessors and Microsystems, IEEE Instrumentation & Measurement Magazine and IEEE Design and Test.

In The Last Decade

Sergei Devadze

47 papers receiving 305 citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name h Career Trend Papers Cites
Sergei Devadze Estonia 11 286 268 54 29 19 54 317
Sudipta Bhawmik United States 14 395 1.4× 396 1.5× 32 0.6× 44 1.5× 22 1.2× 34 450
Mahesh A. Iyer United States 13 447 1.6× 442 1.6× 15 0.3× 42 1.4× 32 1.7× 34 507
T.J. Chakraborty United States 12 504 1.8× 507 1.9× 28 0.5× 17 0.6× 12 0.6× 28 533
K.D. Wagner United States 8 233 0.8× 220 0.8× 36 0.7× 15 0.5× 20 1.1× 12 260
Markus Olbrich Germany 8 126 0.4× 189 0.7× 26 0.5× 60 2.1× 18 0.9× 61 235
Sreejit Chakravarty United States 13 485 1.7× 507 1.9× 55 1.0× 7 0.2× 19 1.0× 57 538
D.K. Bhavsar United States 9 252 0.9× 243 0.9× 43 0.8× 11 0.4× 47 2.5× 24 292
W.H. McAnney United States 10 477 1.7× 459 1.7× 93 1.7× 13 0.4× 14 0.7× 17 497
Sobeeh Almukhaizim United States 12 280 1.0× 319 1.2× 14 0.3× 13 0.4× 34 1.8× 37 336
Samy Makar United States 10 310 1.1× 343 1.3× 25 0.5× 12 0.4× 62 3.3× 16 380

Countries citing papers authored by Sergei Devadze

Since Specialization
Citations

This map shows the geographic impact of Sergei Devadze's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Sergei Devadze with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Sergei Devadze more than expected).

Fields of papers citing papers by Sergei Devadze

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Sergei Devadze. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Sergei Devadze. The network helps show where Sergei Devadze may publish in the future.

Co-authorship network of co-authors of Sergei Devadze

This figure shows the co-authorship network connecting the top 25 collaborators of Sergei Devadze. A scholar is included among the top collaborators of Sergei Devadze based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Sergei Devadze. Sergei Devadze is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
1.
Jenihhin, Maksim, et al.. (2023). On-Chip Sensors Data Collection and Analysis for SoC Health Management. 1–6. 1 indexed citations
2.
Devadze, Sergei, et al.. (2019). Ways for board and system test to benefit from FPGA embedded instrumentation. 1–10. 3 indexed citations
3.
Jutman, Artur, et al.. (2017). Run-time reconfigurable instruments for advanced board-level testing. IEEE Instrumentation & Measurement Magazine. 20(4). 23–30. 1 indexed citations
4.
5.
Jutman, Artur, et al.. (2016). A suite of IEEE 1687 benchmark networks. Lund University Publications (Lund University). 1–10. 35 indexed citations
6.
7.
Ubar, Raimund, et al.. (2015). Fault simulation with parallel exact critical path tracing in multiple core environment. Design, Automation, and Test in Europe. 1180–1185. 7 indexed citations
8.
Ubar, Raimund, et al.. (2015). Transition delay fault simulation with parallel critical path back-tracing and 7-valued algebra. Microprocessors and Microsystems. 39(8). 1130–1138. 2 indexed citations
9.
Ubar, Raimund, et al.. (2015). Fault Simulation with Parallel Exact Critical Path Tracing in Multiple Core Environment. Design, Automation & Test in Europe Conference & Exhibition (DATE), 2015. 1180–1185. 10 indexed citations
10.
Ubar, Raimund, et al.. (2014). Critical Path Tracing Based Simulation of Transition Delay Faults. 6. 108–113. 2 indexed citations
11.
Jutman, Artur, et al.. (2012). Embedded synthetic instruments for Board-Level testing. 1–1. 3 indexed citations
12.
Devadze, Sergei, et al.. (2011). Distributed Fault Simulation with Collaborative Load Balancing for VLSI Circuits. Scalable Computing Practice and Experience. 12(1). 153–163.
13.
Ubar, Raimund, et al.. (2011). SoC and Board Modeling for Processor-Centric Board Testing. 1149. 575–582. 4 indexed citations
14.
Ubar, Raimund, et al.. (2011). Digital logic simulation with compressed BDDs. 4. 105–109. 1 indexed citations
15.
Jutman, Artur, et al.. (2011). Invited paper: System-wide fault management based on IEEE P1687 IJTAG. 1–4. 9 indexed citations
16.
Devadze, Sergei, et al.. (2010). Distributed approach for parallel exact critical path tracing fault simulation. International Conference Mixed Design of Integrated Circuits and Systems. 1. 471–476. 1 indexed citations
17.
Ubar, Raimund, et al.. (2010). E-Learning Environment for WEB-Based Study of Testing. 2 indexed citations
18.
Devadze, Sergei, et al.. (2009). Fast extended test access via JTAG and FPGAs. 1–7. 12 indexed citations
19.
Ubar, Raimund, Sergei Devadze, Jaan Raik, & Artur Jutman. (2008). Parallel fault backtracing for calculation of fault coverage. Asia and South Pacific Design Automation Conference. 667–672. 10 indexed citations
20.
Devadze, Sergei, et al.. (2001). Web-Based Software Implementation of Finite State Machine Decomposition for Design and Education.

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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