Z. Barzilai
- Hardware and Architecture top 2%
- Electrical and Electronic Engineering
- Computer Networks and Communications
- Control and Systems Engineering
- Management Science and Operations Research
- Co-authors
- Barry K. RosenGabriel M. SilbermanL.M. HuismanV. IyengarD.K. BeeceL. S. WooVijay S. IyengarGeorge Markowsky
- Topics
- VLSI and Analog Circuit Testing (10 papers)VLSI and FPGA Design Techniques (7 papers)Low-power high-performance VLSI design (4 papers)
- Journals
- IBM Journal of Research and DevelopmentIEEE Transactions on Computer-Aided Design of Integrated Circuits and SystemsIEEE Design & Test of Computers
- Partner nations
- United StatesIsrael
In The Last Decade
Z. Barzilai
11 papers receiving 341 citations
Peers
Comparison fields: 5 of 16
- Hardware and Architecture 333
- Electrical and Electronic Engineering 285
- Computer Networks and Communications 42
- Control and Systems Engineering 36
- Management Science and Operations Research 32
Countries citing papers authored by Z. Barzilai
This map shows the geographic impact of Z. Barzilai's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Z. Barzilai with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Z. Barzilai more than expected).
Fields of papers citing papers by Z. Barzilai
This network shows the impact of papers produced by Z. Barzilai. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Z. Barzilai. The network helps show where Z. Barzilai may publish in the future.
Co-authorship network of co-authors of Z. Barzilai
This figure shows the co-authorship network connecting the top 25 collaborators of Z. Barzilai. A scholar is included among the top collaborators of Z. Barzilai based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Z. Barzilai. Z. Barzilai is excluded from the visualization to improve readability, since they are connected to all nodes in the network.
All Works
| # | Work | Indexed citations |
|---|---|---|
| 1 | 32 | |
| 2 | 117 | |
| 3 | 17 | |
| 4 | Efficient Fault Simulation of CMOS Circuits with Accurate Models. | 13 |
| 5 | 15 | |
| 6 | Accurate Fault Modeling and Efficient Simulation of Differential CVS Circuits. | 14 |
| 7 | 1 | |
| 8 | 0 | |
| 9 | Comparison of AC self-testing procedures | 123 |
| 10 | 18 | |
| 11 | 11 | |
| 12 | VLSI Self-Testing Based on Syndrome Techniques | 6 |
About Z. Barzilai
Z. Barzilai is a scholar working on Hardware and Architecture, Software and Electrical and Electronic Engineering, having authored 12 papers that have together received 367 indexed citations. Recurring topics across this work include VLSI and Analog Circuit Testing (10 papers), VLSI and FPGA Design Techniques (7 papers) and Low-power high-performance VLSI design (4 papers). The work is most often cited by research in Hardware and Architecture (333 citations), Electrical and Electronic Engineering (285 citations) and Software (17 citations). Z. Barzilai has collaborated with scholars based in United States and Israel. Frequent co-authors include Barry K. Rosen, Gabriel M. Silberman, L.M. Huisman, V. Iyengar, D.K. Beece, L. S. Woo, Vijay S. Iyengar, George Markowsky, J. Savir and Indira Nair. Their work appears in journals such as IBM Journal of Research and Development, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems and IEEE Design & Test of Computers.
Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.