TingTing Hwang

1.8k total citations
119 papers, 1.3k citations indexed

About

TingTing Hwang is a scholar working on Electrical and Electronic Engineering, Hardware and Architecture and Computer Networks and Communications. According to data from OpenAlex, TingTing Hwang has authored 119 papers receiving a total of 1.3k indexed citations (citations by other indexed papers that have themselves been cited), including 98 papers in Electrical and Electronic Engineering, 73 papers in Hardware and Architecture and 32 papers in Computer Networks and Communications. Recurrent topics in TingTing Hwang's work include Low-power high-performance VLSI design (49 papers), VLSI and FPGA Design Techniques (48 papers) and VLSI and Analog Circuit Testing (35 papers). TingTing Hwang is often cited by papers focused on Low-power high-performance VLSI design (49 papers), VLSI and FPGA Design Techniques (48 papers) and VLSI and Analog Circuit Testing (35 papers). TingTing Hwang collaborates with scholars based in Taiwan, United States and China. TingTing Hwang's co-authors include Ang-Chih Hsieh, Wen‐Wei Lin, M.J. Irwin, R.M. Owens, Shih-Chieh Chang, Hsien‐Te Chen, Ting-Chi Wang, Jenq Kuen Lee, Po‐Yuan Chen and Yi‐Cheng Ho and has published in prestigious journals such as IEEE Transactions on Computers, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems and International Journal of Bifurcation and Chaos.

In The Last Decade

TingTing Hwang

108 papers receiving 1.3k citations

Peers

TingTing Hwang
T. Simunic United States
I.N. Hajj United States
Vincent J. Mooney United States
Rabi Mahapatra United States
Li Shen China
TingTing Hwang
Citations per year, relative to TingTing Hwang TingTing Hwang (= 1×) peers Luis Entrena

Countries citing papers authored by TingTing Hwang

Since Specialization
Citations

This map shows the geographic impact of TingTing Hwang's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by TingTing Hwang with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites TingTing Hwang more than expected).

Fields of papers citing papers by TingTing Hwang

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by TingTing Hwang. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by TingTing Hwang. The network helps show where TingTing Hwang may publish in the future.

Co-authorship network of co-authors of TingTing Hwang

This figure shows the co-authorship network connecting the top 25 collaborators of TingTing Hwang. A scholar is included among the top collaborators of TingTing Hwang based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with TingTing Hwang. TingTing Hwang is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
1.
Li, Yiting, You-Cheng Lin, Yung‐Chih Chen, et al.. (2024). A Hybrid Approach to Reverse Engineering on Combinational Circuits. 1–2.
2.
Sun, Hung–Min, et al.. (2021). A New Attack for Self-Certified Digital Signatures for E-commerce Applications.. Journal of information science and engineering. 37. 1449–1466.
3.
Hwang, TingTing, et al.. (2015). Architecture of ring-based redundant TSV for clustered faults. Design, Automation, and Test in Europe. 848–853. 8 indexed citations
4.
Hwang, TingTing, et al.. (2014). Compaction-free compressed cache for high performance multi-core system. International Conference on Computer Aided Design. 140–147. 1 indexed citations
5.
Hwang, TingTing, et al.. (2013). Thread-criticality aware dynamic cache reconfiguration in multi-core system. International Conference on Computer Aided Design. 413–420. 5 indexed citations
6.
Hsieh, Ang-Chih, et al.. (2010). TSV redundancy: architecture and design issues in 3D IC. Design, Automation, and Test in Europe. 166–171. 99 indexed citations
7.
Hsieh, Ang-Chih & TingTing Hwang. (2009). Thermal-aware memory mapping in 3D designs. Design, Automation, and Test in Europe. 1361–1366. 2 indexed citations
8.
Hwang, TingTing, et al.. (2009). Thermal-aware post compilation for VLIW architectures. Asia and South Pacific Design Automation Conference. 606–611. 5 indexed citations
9.
Hwang, TingTing, et al.. (2009). A physical-location-aware X-filling method for IR-drop reduction in at-speed scan test. Design, Automation, and Test in Europe. 1234–1237. 3 indexed citations
10.
Hsieh, Ang-Chih & TingTing Hwang. (2009). Thermal-aware memory mapping in 3D designs. 1361–1366. 4 indexed citations
11.
Chen, Po‐Yuan, Che-Yu Liu, & TingTing Hwang. (2008). Transition-aware decoupling-capacitor allocation in power noise reduction. International Conference on Computer Aided Design. 426–429. 4 indexed citations
12.
Hwang, TingTing, et al.. (2004). Low power design using dual threshold voltage. Asia and South Pacific Design Automation Conference. 205–208. 20 indexed citations
13.
Hwang, TingTing, et al.. (2004). Decomposition of instruction decoder for low power design. Design, Automation, and Test in Europe. 1. 10664–10664. 2 indexed citations
14.
Hwang, TingTing, et al.. (2003). Decomposition of Extended Finite State Machine for Low Power Design. Design, Automation, and Test in Europe. 11152–11153. 3 indexed citations
15.
Wang, Kuo‐Hua, et al.. (2002). Binary decision diagram with minimum expected path length. 708–712. 5 indexed citations
16.
Wang, Kuo‐Hua, et al.. (2001). Binary decision diagram with minimum expected path length. Design, Automation, and Test in Europe. 708–712. 5 indexed citations
17.
Hwang, TingTing, et al.. (1996). Layout driven selecting and chaining of partial scan flip-flops. 262–267. 11 indexed citations
18.
Hwang, TingTing, et al.. (1994). Dynamical identification of critical paths for iterative gate sizing. International Conference on Computer Aided Design. 481–484. 6 indexed citations
19.
Hwang, TingTing, et al.. (1993). Combining technology mapping and placement for delay-optimization in FPGA designs. International Conference on Computer Aided Design. 14(9). 1076–1084. 20 indexed citations
20.
Wang, Kuo‐Hua, et al.. (1993). Overlapped decompositions for communication complexity driven multilevel logic synthesis. IEICE Transactions on Information and Systems. 1075–1084. 1 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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