Thierry Mourier

578 total citations
49 papers, 405 citations indexed

About

Thierry Mourier is a scholar working on Electrical and Electronic Engineering, Electronic, Optical and Magnetic Materials and Biomedical Engineering. According to data from OpenAlex, Thierry Mourier has authored 49 papers receiving a total of 405 indexed citations (citations by other indexed papers that have themselves been cited), including 48 papers in Electrical and Electronic Engineering, 22 papers in Electronic, Optical and Magnetic Materials and 9 papers in Biomedical Engineering. Recurrent topics in Thierry Mourier's work include Copper Interconnects and Reliability (22 papers), 3D IC and TSV technologies (20 papers) and Electronic Packaging and Soldering Technologies (16 papers). Thierry Mourier is often cited by papers focused on Copper Interconnects and Reliability (22 papers), 3D IC and TSV technologies (20 papers) and Electronic Packaging and Soldering Technologies (16 papers). Thierry Mourier collaborates with scholars based in France, United States and Switzerland. Thierry Mourier's co-authors include S. Maı̂trejean, G. Passemard, A. Toffoli, B. Dal’zotto, P. Doppelt, S. Tedesco, Dieter Mayer, Yves Quéré, L. Arnaud and M. Assous and has published in prestigious journals such as ACS Applied Materials & Interfaces, Japanese Journal of Applied Physics and Ultramicroscopy.

In The Last Decade

Thierry Mourier

46 papers receiving 393 citations

Peers

Thierry Mourier

EEE

EOMM

AMPO

M. Angyal United States

Gayle Murdoch Belgium

B. Roberds United States

N. Klymko United States

N. Jourdan Belgium

Chong Kim Ong Singapore

M. Fayolle France

Cory S. Wajda United States

R. Goldblatt United States

Yoshiya Hagimoto Taiwan

M. Angyal United States

Thierry Mourier

379 ×1.1

EEE

238 ×2.1

EOMM

81 ×0.9

72 ×1.4

64 ×1.6

AMPO

Citations per year, relative to Thierry Mourier Thierry Mourier (= 1×) peers M. Angyal

Countries citing papers authored by Thierry Mourier

Since Specialization

Citations

This map shows the geographic impact of Thierry Mourier's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Thierry Mourier with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Thierry Mourier more than expected).

Fields of papers citing papers by Thierry Mourier

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Thierry Mourier. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Thierry Mourier. The network helps show where Thierry Mourier may publish in the future.

Co-authorship network of co-authors of Thierry Mourier

This figure shows the co-authorship network connecting the top 25 collaborators of Thierry Mourier. A scholar is included among the top collaborators of Thierry Mourier based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Thierry Mourier. Thierry Mourier is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

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20 of 20 papers shown

Charbonnier, Jean, Thierry Mourier, & Stéphane Bernabé. (2025). 3-D Packaging Technologies for Advanced Integrated Photonics Modules: A Review. IEEE Transactions on Components Packaging and Manufacturing Technology. 15(8). 1565–1580.

Jousseaume, V., C. Guérin, Kazuya Ichiki, et al.. (2024). Wafer Scale Insulation of High Aspect Ratio Through-Silicon Vias by iCVD. ACS Applied Materials & Interfaces. 16(24). 31624–31635. 6 indexed citations

Berg, Vincent, D. Fowler, Sylvain Guerber, et al.. (2023). An upgradable testing platform designed to characterize and test optical components of FMCW LiDARs, particularly optical phased arrays. 1200801. 12–12. 1 indexed citations

Lévy, François, et al.. (2020). Cu pillar based Advanced Packaging, for large area & fine pitch heterogeneous devices. SPIRE - Sciences Po Institutional REpository. 1–6. 1 indexed citations

Lorut, F., G. Audoit, E. Boller, et al.. (2018). 3D high resolution imaging for microelectronics: A multi-technique survey on copper pillars. Ultramicroscopy. 193. 71–83. 5 indexed citations

Salvetat, T., Eduard Oliva, A. Tauzin, et al.. (2016). III-V multi-junction solar cell using metal wrap through contacts. AIP conference proceedings. 1766. 60004–60004. 6 indexed citations

Jousseaume, V., et al.. (2016). Conformal isolation of high-aspect-ratio TSVs using a low-κ dielectric deposited by filament-assisted CVD. Microelectronic Engineering. 167. 80–84. 6 indexed citations

Barnes, Jean‐Paul, et al.. (2016). Focused ion beam time-of-flight secondary ion mass spectroscopy tomography of through-silicon vias for 3D integration. Journal of Vacuum Science & Technology B Nanotechnology and Microelectronics Materials Processing Measurement and Phenomena. 34(3). 4 indexed citations

Charbonnier, Jean, M. Assous, Thierry Mourier, et al.. (2016). 3D integration for power MOS H bridge power application. 1–7. 1 indexed citations

10.

Sánchez, Darío Ferreira, S. Reboh, Jean‐Sébastien Micha, et al.. (2015). In-situ X-ray μLaue diffraction study of copper through-silicon vias. Microelectronics Reliability. 56. 78–84. 2 indexed citations

11.

Arnal, V., A. Farcy, V. Jousseaume, et al.. (2007). Materials and processes for high signal propagation performance and reliable 32 nm node BEOL. 1–3. 3 indexed citations

12.

Mourier, Thierry, et al.. (2006). Correlation between electromigration and Cu-contact angle after de-wetting. Microelectronic Engineering. 83(11-12). 2373–2376. 10 indexed citations

13.

Haumesser, Paul‐Henri, S. Maı̂trejean, Thierry Mourier, et al.. (2004). Copper metallization for advanced interconnects: the electrochemical revolution. 3–5. 3 indexed citations

14.

Arnaud, L., et al.. (2004). Analysis of resistivity in nano-interconnect: full range (4.2-300 K) temperature characterization. 132–134. 7 indexed citations

15.

Haumesser, Paul‐Henri, et al.. (2003). Copper post-electroplating anneal: evaluation of in-line vs. furnace anneal on layer properties. Microelectronic Engineering. 70(2-4). 470–477. 6 indexed citations

16.

Fayolle, M., J. Torrès, G. Passemard, et al.. (2003). Integration of Cu/SiOC in dual damascene interconnect for 0.1 μm technology using a new SiC material as dielectric barrier. 39–41. 4 indexed citations

17.

Buffet, N., et al.. (1998). 0.12 µm Optical Lithography Performances Using an Alternating Deep UV Phase Shift Mask. Japanese Journal of Applied Physics. 37(12S). 6714–6714. 1 indexed citations

18.

Buffet, N., et al.. (1998). 0.12 μm optical lithography performances using an alternating DUV phase shift mask. Microelectronic Engineering. 41-42. 61–64. 2 indexed citations

19.

Buffet, N., et al.. (1998). 0.18-μm optical lithography performances using an alternating DUV phase-shift mask. Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE. 3334. 25–25.

20.

Vinet, Françoise, et al.. (1992). Comparative study of deep-UV resist processes for 0.35-μm technology. Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE. 1672. 526–526. 1 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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