Theodore W. Manikas
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- Robotic Path Planning Algorithms 5
- Software top 10%
- Software Reliability and Analysis Research 10
- Hardware and Architecture top 10%
- VLSI and Analog Circuit Testing 11
- Control and Systems Engineering top 10%
- Architecture top 10%
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- VLSI and FPGA Design Techniques 8
- Integrated Circuits and Semiconductor Failure Analysis 7
- 3D IC and TSV technologies 6
- Low-power high-performance VLSI design 5
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- Formal Methods in Verification 7
- Co-authors
- K. AshenayiRoger L. WainwrightHeng‐Ming TaiR.L. WainwrightMitchell A. ThorntonDaniel AshlockPeter G. LoPrestiM.H. Mickle
- Partner nations
- United StatesJapanCanada
In The Last Decade
Theodore W. Manikas
37 papers receiving 391 citations
Peers
Comparison fields: 5 of 60
- Computer Vision and Pattern Recognition 221
- Software 34
- Hardware and Architecture 43
- Control and Systems Engineering 114
- Architecture 7
Countries citing papers authored by Theodore W. Manikas
This map shows the geographic impact of Theodore W. Manikas's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Theodore W. Manikas with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Theodore W. Manikas more than expected).
Fields of papers citing papers by Theodore W. Manikas
This network shows the impact of papers produced by Theodore W. Manikas. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Theodore W. Manikas. The network helps show where Theodore W. Manikas may publish in the future.
Co-authorship network
The 25 scholars most cited alongside Theodore W. Manikas, linked wherever they have co-authored with each other. Click a name or a connecting line to browse the papers they share.
All Works
| # | Work | ||
|---|---|---|---|
| 1 | 2025 | 1 | |
| 2 | 2023 | 0 | |
| 3 | 2021 | 1 | |
| 4 | 2020 | 3 | |
| 5 | 2019 | 2 | |
| 6 | 2016 | 1 | |
| 7 | 2013 | 2 | |
| 8 | 2013 | 2 | |
| 9 | Mission Planning Analysis using Decision Diagrams | 2011 | 2 |
| 10 | 2011 | 17 | |
| 11 | 2010 | 12 | |
| 12 | 2009 | 4 | |
| 13 | 2008 | 4 | |
| 14 | Power-density aware floorplanning for reducing maximum on-chip temperature | 2007 | 4 |
| 15 | Nanoscale Power and Memory Unit Design for Nanoscale Sensor Systems | 2007 | 1 |
| 16 | 2003 | 22 | |
| 17 | 2002 | 1 | |
| 18 | 2002 | 0 | |
| 19 | A genetic algorithm approach for mixed-macro and standard cell placement that directly incorporates cell membership information (circuit layout) | 1999 | 2 |
| 20 | Genetic Algorithms vs. Simulated Annealing: A Comparison of Approaches for Solving the Circuit Partitioning Problem | 1996 | 38 |
About Theodore W. Manikas
Theodore W. Manikas is a scholar working on Software, Hardware and Architecture and Architecture, having authored 41 papers that have together received 427 indexed citations. Recurring topics across this work include VLSI and Analog Circuit Testing (11 papers), Software Reliability and Analysis Research (10 papers), VLSI and FPGA Design Techniques (8 papers), Integrated Circuits and Semiconductor Failure Analysis (7 papers), Formal Methods in Verification (7 papers), 3D IC and TSV technologies (6 papers), Low-power high-performance VLSI design (5 papers) and Robotic Path Planning Algorithms (5 papers). The work is most often cited by research in Computer Vision and Pattern Recognition (221 citations), Software (34 citations) and Hardware and Architecture (43 citations). Theodore W. Manikas has collaborated with scholars based in United States, Japan and Canada. Frequent co-authors include K. Ashenayi, Roger L. Wainwright, Heng‐Ming Tai, R.L. Wainwright, Mitchell A. Thornton, Daniel Ashlock, Peter G. LoPresti, M.H. Mickle, Jennifer Dworak and Kundan Nepal.
Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.