T. Yamazaki

421 total citations
41 papers, 214 citations indexed

About

T. Yamazaki is a scholar working on Electrical and Electronic Engineering, Biomedical Engineering and Hardware and Architecture. According to data from OpenAlex, T. Yamazaki has authored 41 papers receiving a total of 214 indexed citations (citations by other indexed papers that have themselves been cited), including 38 papers in Electrical and Electronic Engineering, 9 papers in Biomedical Engineering and 3 papers in Hardware and Architecture. Recurrent topics in T. Yamazaki's work include Semiconductor materials and devices (19 papers), Advancements in Semiconductor Devices and Circuit Design (16 papers) and Radio Frequency Integrated Circuit Design (14 papers). T. Yamazaki is often cited by papers focused on Semiconductor materials and devices (19 papers), Advancements in Semiconductor Devices and Circuit Design (16 papers) and Radio Frequency Integrated Circuit Design (14 papers). T. Yamazaki collaborates with scholars based in Japan and Sweden. T. Yamazaki's co-authors include Hiroshi Yoshida, Mohammad Madihian, Kazuo Imai, Y. Kinoshita, L. Desclos, Kazuyuki Nakamura, H. Hirabayashi, Tomislav Drenski, Hiroki Fujii and K. Yamaoka and has published in prestigious journals such as Journal of The Electrochemical Society, IEEE Journal of Solid-State Circuits and IEEE Transactions on Microwave Theory and Techniques.

In The Last Decade

T. Yamazaki

36 papers receiving 206 citations

Peers

Countries citing papers authored by T. Yamazaki

Since Specialization

Citations

This map shows the geographic impact of T. Yamazaki's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by T. Yamazaki with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites T. Yamazaki more than expected).

Fields of papers citing papers by T. Yamazaki

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by T. Yamazaki. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by T. Yamazaki. The network helps show where T. Yamazaki may publish in the future.

Co-authorship network of co-authors of T. Yamazaki

This figure shows the co-authorship network connecting the top 25 collaborators of T. Yamazaki. A scholar is included among the top collaborators of T. Yamazaki based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with T. Yamazaki. T. Yamazaki is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

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20 of 20 papers shown

#	Work	Indexed citations
1	Real chip size three-dimensional stacked package 2005 ·IEEE Transactions on Advanced Packaging ·T. Yamazaki, (unknown), (unknown), (unknown), (unknown), (unknown)	11
2	X-ray Spectral Behavior in the Low/Hard States of Black Hole Candidates 2005 ·Chinese Journal of Astronomy and Astrophysics ·K. Yamaoka, (unknown), (unknown), T. Yamazaki, A. Yoshida	18
3	A 0.18-μm RF SiGe BiCMOS technology with collector-epi-free double-poly self-aligned HBTs 2003 ·IEEE Transactions on Electron Devices ·Fumihiko Satô, Takashi Hashimoto, Hiroki Fujii, Hiroshi Yoshida, (unknown), T. Yamazaki	2
4	CMOS RF ICs for 900 MHz-2.4 GHz band wireless communication networks 2003 ·Mohammad Madihian, L. Desclos, Tomislav Drenski, Y. Kinoshita, Hiroki Fujii, T. Yamazaki	10
5	A novel sub-2.0 V BiCMOS logic circuit with a BiCMOS charge pump 2002 ·(unknown), (unknown), (unknown), (unknown), Kazuo Imai, Y. Kinoshita, T. Yamazaki	2
6	An RF BiCMOS process using high f/sub SR/ spiral inductor with premetal deep trenches and a dual recessed bipolar collector sink 2002 ·Hiroshi Yoshida, (unknown), Y. Kinoshita, Hiroki Fujii, T. Yamazaki	5
7	A Si/SiGe heterojunction bipolar transistor with undoped SiGe spacer for CRYO-BiCMOS circuits 2002 ·T. Yamazaki, Kazuo Imai, T. Tashiro, T. Tatsumi, (unknown), (unknown)	0
8	Process integration technology for sub-30 ps ECL BiCMOS using heavily boron doped epitaxial contact (HYDEC) 2002 ·Y. Kinoshita, Kazuo Imai, Hiroshi Yoshida, (unknown), T. Tatsumi, T. Yamazaki	2
9	Process integration technology for low process complexity BiCMOS using trench collector sink 2002 ·Hiroshi Yoshida, (unknown), Y. Kinoshita, Kazuo Imai, (unknown), K. Tokashiki, T. Yamazaki	1
10	A CRYO-BiCMOS technology with Si/SiGe heterojunction bipolar transistors 2002 ·Kazuo Imai, T. Yamazaki, T. Tashiro, T. Tatsumi, (unknown), Naoaki Aizaki, (unknown)	2
11	PLL timing design techniques for large-scale, high-speed, low-power, and low-cost SRAMs 2002 ·Kazuyuki Nakamura, (unknown), Tsukasa Kimura, (unknown), (unknown), Hiroshi Yoshida, T. Yamazaki	0
12	A 0.15-/spl mu/m/73-GHz f/sub max/ RF BiCMOS technology using cobalt silicide ring extrinsic-base structure 1999 ·(unknown), Hiroshi Yoshida, Y. Kinoshita, Hiroki Fujii, T. Yamazaki	1
13	A 2-V, 1-10 GHz BiCMOS transceiver chip for multimode wireless communications networks 1997 ·IEEE Journal of Solid-State Circuits ·Mohammad Madihian, (unknown), Hiroshi Yoshida, H. Hirabayashi, Kazuo Imai, Y. Kinoshita, T. Yamazaki, L. Desclos	13
14	A 6-ns, 1.5-V, 4-Mb BiCMOS SRAM 1996 ·IEEE Journal of Solid-State Circuits ·H. Toyoshima, (unknown), Koichi Takeda, Kazuyuki Nakamura, (unknown), (unknown), (unknown), Hiroshi Yoshida, T. Yamazaki	2
15	L-C-band low-voltage BiCMOS MMICs for dual-mode cellular-LAN applications 1996 ·IEEE Transactions on Microwave Theory and Techniques ·Mohammad Madihian, Kazuo Imai, Hiroshi Yoshida, Y. Kinoshita, T. Yamazaki	13
16	PLL Timing Design Techniques for Large-Scale, High-Speed, Low-Power, Low-Cost SRAMs 1995 ·IEICE Transactions on Electronics ·Kazuyuki Nakamura, (unknown), (unknown), (unknown), (unknown), Hiroshi Yoshida, T. Yamazaki	1
17	A Premetal BPSG Filled Deep Trench Isolation Technology for ECL-BiCMOS LSIs using CMP 1995 ·European Solid-State Device Research Conference ·Hiroshi Yoshida, (unknown), (unknown), (unknown), (unknown), K. Tokashiki, Mohammad Madihian, T. Yamazaki	1
18	A High Performance 0.4μm BiCMOS Technology for 16Mb Fast SRAMs 1994 ·European Solid-State Device Research Conference ·T. Yamazaki, Hiroshi Suzuki, Hiroshi Yoshida, Kazuyuki Nakamura, (unknown), Tsukasa Kimura, (unknown)	0
19	A 220-MHz pipelined 16-Mb BiCMOS SRAM with PLL proportional self-timing generator 1994 ·IEEE Journal of Solid-State Circuits ·Kazuyuki Nakamura, (unknown), Tsukasa Kimura, (unknown), (unknown), Hiroshi Yoshida, T. Yamazaki	14
20	A 5 ns 1 Mb ECL BiCMOS SRAM 1990 ·(unknown), Kentaro Nakamura, (unknown), K. Furuta, T. Yamazaki, Kazuo Imai, (unknown), Yasuhiro Fukuda, (unknown), (unknown)	14

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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