Niraj K. Jha

23.6k total citations · 3 hit papers
509 papers, 15.1k citations indexed

About

Niraj K. Jha is a scholar working on Electrical and Electronic Engineering, Hardware and Architecture and Computer Networks and Communications. According to data from OpenAlex, Niraj K. Jha has authored 509 papers receiving a total of 15.1k indexed citations (citations by other indexed papers that have themselves been cited), including 282 papers in Electrical and Electronic Engineering, 278 papers in Hardware and Architecture and 114 papers in Computer Networks and Communications. Recurrent topics in Niraj K. Jha's work include Embedded Systems Design Techniques (144 papers), Parallel Computing and Optimization Techniques (141 papers) and Low-power high-performance VLSI design (115 papers). Niraj K. Jha is often cited by papers focused on Embedded Systems Design Techniques (144 papers), Parallel Computing and Optimization Techniques (141 papers) and Low-power high-performance VLSI design (115 papers). Niraj K. Jha collaborates with scholars based in United States, India and Japan. Niraj K. Jha's co-authors include Anand Raghunathan, Li-Shiuan Peh, Jiong Luo, Arsalan Mosenia, Li Shang, Robert P. Dick, Niket Agarwal, Hongxu Yin, Amit Kumar and Lin Zhong and has published in prestigious journals such as Proceedings of the IEEE, Scientific Reports and IEEE Transactions on Power Electronics.

In The Last Decade

Niraj K. Jha

489 papers receiving 14.2k citations

Hit Papers

align trajectories

What are hit papers?

Hit papers significantly outperform the citation benchmark for their cohort. A paper qualifies if it has ≥500 total citations, achieves ≥1.5× the top-1% citation threshold for papers in the same subfield and year (this is the minimum needed to enter the top 1%, not the average within it), or reaches the top citation threshold in at least one of its specific research topics.

GARNET: A detailed on-chip network model inside a full-system simulator

2009 578 citations Niket Agarwal, Tushar Krishna et al. profile →
A Comprehensive Study of Security of Internet-of-Things

2016 501 citations Niraj K. Jha et al. profile →
Dreaming to Distill: Data-Free Knowledge Transfer via DeepInversion

2020 284 citations Hongxu Yin, Niraj K. Jha et al. profile →

Peers

Countries citing papers authored by Niraj K. Jha

Since Specialization

Citations

This map shows the geographic impact of Niraj K. Jha's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Niraj K. Jha with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Niraj K. Jha more than expected).

Fields of papers citing papers by Niraj K. Jha

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Niraj K. Jha. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Niraj K. Jha. The network helps show where Niraj K. Jha may publish in the future.

Co-authorship network of co-authors of Niraj K. Jha

This figure shows the co-authorship network connecting the top 25 collaborators of Niraj K. Jha. A scholar is included among the top collaborators of Niraj K. Jha based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Niraj K. Jha. Niraj K. Jha is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

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20 of 20 papers shown

#	Work	Indexed citations
1	Why MagNet: Quantifying the Complexity of Modeling Power Magnetic Material Characteristics 2023 ·IEEE Transactions on Power Electronics ·Diego Serrano, Haoran Li, Shukai Wang, Thomas Guillod, Min Luo, (unknown), Niraj K. Jha, Yuxin Chen, Charles R. Sullivan, Minjie Chen	47
2	How MagNet: Machine Learning Framework for Modeling Power Magnetic Material Characteristics 2023 ·IEEE Transactions on Power Electronics ·Haoran Li, Diego Serrano, Thomas Guillod, Shukai Wang, (unknown), (unknown), Min Luo, (unknown), Niraj K. Jha, Yuxin Chen, Charles R. Sullivan, Minjie Chen	37
3	Simultaneously ensuring smartness, security, and energy efficiency in Internet-of-Things sensors 2018 ·(unknown), Hongxu Yin, Niraj K. Jha	10
4	Smart healthcare 2018 ·Niraj K. Jha	2
5	Hijacking an insulin pump: Security attacks and defenses for a diabetes therapy system 2011 ·Chunxiao Li, Anand Raghunathan, Niraj K. Jha	214
6	GARNET: A detailed on-chip network model inside a full-system simulator breakdown → 2009 ·Niket Agarwal, Tushar Krishna, Li-Shiuan Peh, Niraj K. Jha	578
7	Synthesis of reversible logic 2004 ·Design, Automation, and Test in Europe ·Abhinav Agrawal, Niraj K. Jha	49
8	Synthesis and optimization of threshold logic networks with application to nanotechnologies 2004 ·Design, Automation, and Test in Europe ·Rui Zhang, Pallav Gupta, Lin Zhong, Niraj K. Jha	29
9	Software Architectural Transformations: A New Approach to Low Energy Embedded Software 2003 ·Design, Automation, and Test in Europe ·(unknown), Anand Raghunathan, Niraj K. Jha	23
10	Combined Dynamic Voltage Scaling and Adaptive Body Biasing for Heterogeneous Distributed Real-time Embedded Systems 2003 ·International Conference on Computer Aided Design ·(unknown), Jiong Luo, Niraj K. Jha	109
11	Functional Partitioning for Low Power Distributed Systems of Systems-on-a-chip 2002 ·Asia and South Pacific Design Automation Conference ·Yunsi Fei, Niraj K. Jha	5
12	An Economics-based Power-aware Protocol for Computation Distribution in Mobile Ad-Hoc Networks. 2002 ·Li Shang, Robert P. Dick, Niraj K. Jha	14
13	Low power system scheduling and synthesis 2001 ·International Conference on Computer Aided Design ·Niraj K. Jha	87
14	Wavesched: a novel scheduling technique for control-flow intensive behavioral descriptions 1997 ·International Conference on Computer Aided Design ·Ganesh Lakshminarayana, K.S. Khouri, Niraj K. Jha	30
15	A design for testability technique for RTL circuits using control/data flow extraction 1996 ·International Conference on Computer Aided Design ·Indradeep Ghosh, Anand Raghunathan, Niraj K. Jha	39
16	Register-transfer level estimation techniques for switching activity and power consumption 1996 ·International Conference on Computer Aided Design ·Anand Raghunathan, Sujit Dey, Niraj K. Jha	82
17	Controller re-specification to minimize switching activity in controller/data path circuits 1996 ·Anand Raghunathan, S. Dey, Niraj K. Jha, Katsunori Wakabayashi	10
18	MACHETE: synthesis of sequential machines for easy testability 1991 ·European Design Automation Conference ·(unknown), Niraj K. Jha	3
19	Detection of multiple input bridging and stuck-on faults in CMOS logic circuits using current monitoring 1990 ·European Design Automation Conference ·Niraj K. Jha, (unknown)	6
20	DETECTING MULTIPLE FAULTS IN CMOS CIRCUITS. 1986 ·International Test Conference ·Niraj K. Jha	11

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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