Sherief Reda
Impact in
- Hardware and Architecture top 0.2%
- Parallel Computing and Optimization Techniques
- VLSI and Analog Circuit Testing
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- Low-power high-performance VLSI design
- VLSI and FPGA Design Techniques
- Advancements in Semiconductor Devices and Circuit Design
- 3D IC and TSV technologies
- Integrated Circuits and Semiconductor Failure Analysis
- Advanced Memory and Neural Computing
Papers in
-
- VLSI and Analog Circuit Testing 41
- Parallel Computing and Optimization Techniques 38
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- VLSI and FPGA Design Techniques 40
- Low-power high-performance VLSI design 35
- 3D IC and TSV technologies 19
- Advancements in Semiconductor Devices and Circuit Design 15
- Advanced Memory and Neural Computing 14
- Co-authors
- R. Iris BaharRyan CochranSoheil HashemiAndrew B. KahngAbdullah Nazma NowrozAyse K. CoskunCan HankendiAlex Orailoğlu
- Journals
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (9 papers)IEEE Computer Architecture Letters (3 papers)IEEE Transactions on Very Large Scale Integration (VLSI) Systems (2 papers)Nature Communications (2 papers)IEEE Design and Test (2 papers)
- Partner nations
- United StatesIranEgypt
In The Last Decade
Sherief Reda
146 papers receiving 3.1k citations
Peers
Comparison fields: 5 of 86
- Hardware and Architecture 1.7k
- Electrical and Electronic Engineering 2.4k
- Computer Networks and Communications 635
- Computational Theory and Mathematics 251
- Information Systems 302
Countries citing papers authored by Sherief Reda
This map shows the geographic impact of Sherief Reda's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Sherief Reda with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Sherief Reda more than expected).
Fields of papers citing papers by Sherief Reda
This network shows the impact of papers produced by Sherief Reda. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Sherief Reda. The network helps show where Sherief Reda may publish in the future.
Co-authors
The 25 scholars most cited alongside Sherief Reda, linked wherever they have co-authored with each other. Click a name or a connecting line to browse the papers they share.
All Works
| # | Work | ||
|---|---|---|---|
| 1 | 2024 | 1 | |
| 2 | 2024 | 1 | |
| 3 | 2023 | 8 | |
| 4 | 2023 | 2 | |
| 5 | 2021 | 26 | |
| 6 | 2020 | 63 | |
| 7 | 2020 | 50 | |
| 8 | 2019 | 11 | |
| 9 | 2015 | 226 | |
| 10 | 2015 | 133 | |
| 11 | 2013 | 45 | |
| 12 | 2013 | 16 | |
| 13 | 2013 | 6 | |
| 14 | 2011 | 18 | |
| 15 | 2008 | 34 | |
| 16 | 2007 | 30 | |
| 17 | 2004 | 9 | |
| 18 | 2004 | 6 | |
| 19 | 2003 | 20 | |
| 20 | 2002 | 57 |
About Sherief Reda
Sherief Reda is a scholar working on Hardware and Architecture, Electrical and Electronic Engineering, Computer Networks and Communications, Computer Graphics and Computer-Aided Design and Industrial and Manufacturing Engineering, having authored 153 papers that have together received 3.2k indexed citations. Recurring topics across this work include VLSI and Analog Circuit Testing (41 papers), VLSI and FPGA Design Techniques (40 papers), Parallel Computing and Optimization Techniques (38 papers), Low-power high-performance VLSI design (35 papers), 3D IC and TSV technologies (19 papers), Cloud Computing and Resource Management (18 papers), Advancements in Semiconductor Devices and Circuit Design (15 papers) and Advanced Memory and Neural Computing (14 papers). The work is most often cited by research in Hardware and Architecture (1.7k citations), Electrical and Electronic Engineering (2.4k citations), Computer Networks and Communications (635 citations), Computational Theory and Mathematics (251 citations) and Information Systems (302 citations). Sherief Reda has collaborated with scholars based in United States, Iran and Egypt. Frequent co-authors include R. Iris Bahar, Ryan Cochran, Soheil Hashemi, Andrew B. Kahng, Abdullah Nazma Nowroz, Ayse K. Coskun, Can Hankendi, Alex Orailoğlu, Farinaz Koushanfar and Xin Zhan. Their work appears in journals such as IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, IEEE Computer Architecture Letters, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Nature Communications and IEEE Design and Test.
Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.