Sarma Vrudhula

8.9k total citations · 1 hit paper
221 papers, 6.6k citations indexed

About

Sarma Vrudhula is a scholar working on Electrical and Electronic Engineering, Hardware and Architecture and Computer Networks and Communications. According to data from OpenAlex, Sarma Vrudhula has authored 221 papers receiving a total of 6.6k indexed citations (citations by other indexed papers that have themselves been cited), including 184 papers in Electrical and Electronic Engineering, 100 papers in Hardware and Architecture and 31 papers in Computer Networks and Communications. Recurrent topics in Sarma Vrudhula's work include Low-power high-performance VLSI design (101 papers), VLSI and FPGA Design Techniques (50 papers) and Parallel Computing and Optimization Techniques (46 papers). Sarma Vrudhula is often cited by papers focused on Low-power high-performance VLSI design (101 papers), VLSI and FPGA Design Techniques (50 papers) and Parallel Computing and Optimization Techniques (46 papers). Sarma Vrudhula collaborates with scholars based in United States, South Korea and Canada. Sarma Vrudhula's co-authors include Yu Cao, Daler Rakhmatov, Jae-sun Seo, Yufei Ma, Sarvesh Bhardwaj, Ravishankar Rao, Vinay Hanumaiah, Wenping Wang, Rakesh Vattikonda and Praveen Ghanta and has published in prestigious journals such as SHILAP Revista de lepidopterología, Annals of the New York Academy of Sciences and IEEE Transactions on Wireless Communications.

In The Last Decade

Sarma Vrudhula

209 papers receiving 6.4k citations

Hit Papers

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What are hit papers?

Hit papers significantly outperform the citation benchmark for their cohort. A paper qualifies if it has ≥500 total citations, achieves ≥1.5× the top-1% citation threshold for papers in the same subfield and year (this is the minimum needed to enter the top 1%, not the average within it), or reaches the top citation threshold in at least one of its specific research topics.

Throughput-Optimized OpenCL-based FPGA Accelerator for Large-Scale Convolutional Neural Networks

2016 393 citations Abinash Mohanty, Yufei Ma et al. profile →

Peers

Countries citing papers authored by Sarma Vrudhula

Since Specialization

Citations

This map shows the geographic impact of Sarma Vrudhula's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Sarma Vrudhula with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Sarma Vrudhula more than expected).

Fields of papers citing papers by Sarma Vrudhula

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Sarma Vrudhula. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Sarma Vrudhula. The network helps show where Sarma Vrudhula may publish in the future.

Co-authorship network of co-authors of Sarma Vrudhula

This figure shows the co-authorship network connecting the top 25 collaborators of Sarma Vrudhula. A scholar is included among the top collaborators of Sarma Vrudhula based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Sarma Vrudhula. Sarma Vrudhula is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

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20 of 20 papers shown

#	Work	Indexed citations
1	Energy-Efficient, Delay-Constrained Edge Computing of a Network of DNNs 2024 ·IEEE Transactions on Computers ·(unknown), (unknown), Young Geun Kim, Carole-Jean Wu, Sarma Vrudhula	0
2	Hardware-Software Co-Design for Path Planning by Drones 2024 ·(unknown), (unknown), (unknown), Nakul Gopalan, Sarma Vrudhula	1
3	Performance Modeling for CNN Inference Accelerators on FPGA 2019 ·IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ·Yufei Ma, Yu Cao, Sarma Vrudhula, Jae-sun Seo	43
4	Automatic Compilation of Diverse CNNs Onto High-Performance FPGA Accelerators 2018 ·IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ·Yufei Ma, Yu Cao, Sarma Vrudhula, Jae-sun Seo	54
5	Optimizing the Convolution Operation to Accelerate Deep Neural Networks on FPGA 2018 ·IEEE Transactions on Very Large Scale Integration (VLSI) Systems ·Yufei Ma, Yu Cao, Sarma Vrudhula, Jae-sun Seo	247
6	Technology-design co-optimization of resistive cross-point array for accelerating learning algorithms on chip 2015 ·Design, Automation, and Test in Europe ·Pai-Yu Chen, Deepak Kadetotad, Zihan Xu, Abinash Mohanty, Binbin Lin, Jieping Ye, Sarma Vrudhula, Jae-sun Seo, Yu Cao, Shimeng Yu	38
7	Performance optimal speed control of multi-core processors under thermal constraints 2009 ·Design, Automation, and Test in Europe ·Vinay Hanumaiah, Sarma Vrudhula, Karam S. Chatha	9
8	Modeling of Gene Regulatory Network Dynamics Using Threshold Logic 2009 ·Annals of the New York Academy of Sciences ·(unknown), Sarma Vrudhula, Seungchan Kim	4
9	Decomposition based approach for synthesis of multi-level threshold logic circuits 2008 ·Asia and South Pacific Design Automation Conference ·(unknown), Sarma Vrudhula	16
10	Efficient online computation of core speeds to maximize the throughput of thermally constrained multi-core processors 2008 ·International Conference on Computer Aided Design ·Ravishankar Rao, Sarma Vrudhula	36
11	Predictive Modeling of the NBTI Effect for Reliable Design 2006 ·Sarvesh Bhardwaj, Wenping Wang, Rakesh Vattikonda, Yu Cao, Sarma Vrudhula	349
12	Formalizing designer's preferences for multiattribute optimization with application to leakage-delay tradeoffs 2005 ·International Conference on Computer Aided Design ·Sarvesh Bhardwaj, Sarma Vrudhula	3
13	Battery optimization vs energy optimization: which to choose and when? 2005 ·International Conference on Computer Aided Design ·Ramesh R. Rao, Sarma Vrudhula	41
14	A framework for battery-aware sensor management 2004 ·Design, Automation, and Test in Europe ·(unknown), Sarma Vrudhula, Kaviraj Chopra, R. Srinivasan	22
15	"AU: Timing Analysis Under Uncertainty 2003 ·International Conference on Computer Aided Design ·Sarvesh Bhardwaj, Sarma Vrudhula, David Blaauw	41
16	Statistical Timing Analysis Using Bounds 2003 ·Design, Automation, and Test in Europe ·Aseem Agarwal, David Blaauw, Vladimir Zolotov, Sarma Vrudhula	37
17	Investigation of power delay trade-offs for dual Vt CMOS circuits 1999 ·Qi Wang, Sarma Vrudhula	12
18	Data driven power optimization of sequential circuits 1998 ·Design, Automation, and Test in Europe ·Qi Wang, Sarma Vrudhula	1
19	Multi-level logic optimization for low power using local logic transformations 1996 ·International Conference on Computer Aided Design ·Qi Wang, Sarma Vrudhula	12
20	FGILP: an integer linear program solver based on function graphs 1993 ·International Conference on Computer Aided Design ·Yung-Te Lai, Massoud Pedram, Sarma Vrudhula	10

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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