H. Kondoh

586 total citations
34 papers, 389 citations indexed

About

H. Kondoh is a scholar working on Electrical and Electronic Engineering, Hardware and Architecture and Computer Networks and Communications. According to data from OpenAlex, H. Kondoh has authored 34 papers receiving a total of 389 indexed citations (citations by other indexed papers that have themselves been cited), including 27 papers in Electrical and Electronic Engineering, 14 papers in Hardware and Architecture and 13 papers in Computer Networks and Communications. Recurrent topics in H. Kondoh's work include Interconnection Networks and Systems (12 papers), Embedded Systems Design Techniques (8 papers) and Advancements in PLL and VCO Technologies (8 papers). H. Kondoh is often cited by papers focused on Interconnection Networks and Systems (12 papers), Embedded Systems Design Techniques (8 papers) and Advancements in PLL and VCO Technologies (8 papers). H. Kondoh collaborates with scholars based in Japan, United States and Germany. H. Kondoh's co-authors include Takahiro Miki, Akira Maeda, Yohei Nakamura, Yoshio Matsuda, T. Yamada, S. Kayano, K. Mashiko, Keisuke Okada, Akira Maeda and H. Hagino and has published in prestigious journals such as IEEE Journal on Selected Areas in Communications, IEEE Journal of Solid-State Circuits and IEEE Transactions on Microwave Theory and Techniques.

In The Last Decade

H. Kondoh

30 papers receiving 349 citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name	h						Papers	Cites
H. Kondoh Japan	11	317	145	94	68	49	34	389
M. Ismail United States	4	296 0.9×	228 1.6×	29 0.3×	41 0.6×	31 0.6×	9	334
P. Jespers Belgium	10	302 1.0×	167 1.2×	21 0.2×	88 1.3×	28 0.6×	39	383
B.M. Gordon United Kingdom	4	446 1.4×	165 1.1×	72 0.8×	23 0.3×	129 2.6×	7	511
Changku Hwang United States	9	271 0.9×	181 1.2×	70 0.7×	19 0.3×	76 1.6×	26	332
S.J. Daubert United States	6	241 0.8×	191 1.3×	85 0.9×	20 0.3×	99 2.0×	12	332
Min-Sun Keel United States	10	407 1.3×	122 0.8×	40 0.4×	33 0.5×	61 1.2×	18	464
Tatsuji Matsuura Japan	12	457 1.4×	348 2.4×	51 0.5×	15 0.2×	44 0.9×	65	491
T.S. Rathore India	9	197 0.6×	167 1.2×	75 0.8×	23 0.3×	10 0.2×	120	264
David Nairn Canada	12	478 1.5×	373 2.6×	63 0.7×	14 0.2×	57 1.2×	38	510
D. Stark United States	11	375 1.2×	235 1.6×	69 0.7×	40 0.6×	145 3.0×	29	540

Countries citing papers authored by H. Kondoh

Since Specialization

Citations

This map shows the geographic impact of H. Kondoh's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by H. Kondoh with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites H. Kondoh more than expected).

Fields of papers citing papers by H. Kondoh

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by H. Kondoh. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by H. Kondoh. The network helps show where H. Kondoh may publish in the future.

Co-authorship network of co-authors of H. Kondoh

This figure shows the co-authorship network connecting the top 25 collaborators of H. Kondoh. A scholar is included among the top collaborators of H. Kondoh based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with H. Kondoh. H. Kondoh is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

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20 of 20 papers shown

Ichino, H., et al.. (2005). ENHANCED NETWORK SIGNALING FOR 10 GIGABIT ETHERNET TO ACHIEVE A LAN-WAN SEAMLESS INTERFACE AND ITS IMPLEMENTATION IN THE PHY-LSI/TRANSCEIVER MODULE. International Journal of High Speed Electronics and Systems. 15(3). 667–704.

Kondoh, H., et al.. (2005). 0-7803-1918-4/94/$3.00 c 1994 IEEE. 129–130. 7 indexed citations

Minato, T., et al.. (2005). Effects of shorted collector on characteristics of IGBTs. 131–136. 8 indexed citations

Kondoh, H., et al.. (2004). A 12.5Gbps half-rate CMOS CDR circuit for 10Gbps network applications. e86 c. 268–271. 4 indexed citations

Kondoh, H., et al.. (2003). A 10 Gbase Ethernet Transceiver (LAN PHY) in a 1.8 V, 0.18ìm SOI/CMOS Technology. IEICE Transactions on Electronics. 86(4). 643–651. 3 indexed citations

Kondoh, H., et al.. (2003). An 8*8 ATM switch LSI with shared multi-buffer architecture. 74–75.

Yamanaka, Hisashi, Hideo Saitô, Hiroaki Yamada, et al.. (2002). 622 Mb/s 8×8 shared multibuffer ATM switch with hierarchical queueing and multicast functions. 1488–1495. 10 indexed citations

Saitô, Hideo, H. Kondoh, Hisashi Yamanaka, et al.. (2002). A 622 Mb/s 32×32 scalable shared buffer ATM switch with searchable address queue. 2. 1363–1368.

Kohama, Teruhiko, H. Kondoh, & Yoshihiko Akaiwa. (2002). An adaptive equalizer for frequency-selective mobile radio channels with noncoherent demodulation. 770–775. 1 indexed citations

10.

Kondoh, H., et al.. (2002). An efficient self-timed queue architecture for ATM switch LSI's. 637–640. 5 indexed citations

11.

Yamanaka, Hisashi, Hideo Saitô, H. Kondoh, et al.. (1997). Scalable shared-buffering ATM switch with a versatile searchable queue. IEEE Journal on Selected Areas in Communications. 15(5). 773–784. 21 indexed citations

12.

Yamanaka, Hideaki, et al.. (1996). Shared Multibuffer ATM Switches with Hierarchical Queueing and Multicast Functions. IEICE Transactions on Communications. 79(8). 1109–1120. 2 indexed citations

13.

Kondoh, H., et al.. (1995). A 1.5-V 250-MHz to 3.0-V 622-MHz Operation CMOS Phase-Locked Loop with Precharge Type Phase-Frequency Detector. IEICE Transactions on Electronics. 78(4). 381–388. 22 indexed citations

14.

Kondoh, H., et al.. (1993). A Shared Multibuffer Architecture for High-Speed ATM Switch LSIs (Special Issue on New Architecture LSIs). IEICE Transactions on Electronics. 76(7). 1094–1101. 2 indexed citations

15.

Kondoh, H., Hisashi Yamanaka, Hideo Saitô, et al.. (1993). A 622-Mb/s 8*8 ATM switch chip set with shared multibuffer architecture. IEEE Journal of Solid-State Circuits. 28(7). 808–815. 18 indexed citations

16.

Mashiko, K., Keisuke Okada, T. Yamada, et al.. (1991). A 336-neuron, 28 K-synapse, self-learning neural network chip with branch-neuron-unit architecture. IEEE Journal of Solid-State Circuits. 26(11). 1637–1644. 38 indexed citations

17.

Mashiko, K., Keisuke Okada, T. Yamada, et al.. (1991). A 336-neuron 28k-synapse Self-learning Neural Network Chip With Branch-neuron-unit Architecture. 182–313. 12 indexed citations

18.

Nakamura, Yohei, et al.. (1990). A 10-bit 70 MS/s CMOS D/A converter. 57–58. 8 indexed citations

19.

Mashiko, K., Keisuke Okada, T. Yamada, et al.. (1990). A self-learning neural network chip with 125 neurons and 10 K self-organization synapses. 63–64. 5 indexed citations

20.

Kondoh, H., et al.. (1987). Study and Development Effort on Opposed Gate-Source GaAs Devices. Final Report. 1 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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