Richard N. Pelavin
- Electrical and Electronic Engineering top 10%
- Computer Networks and Communications top 5%
- Hardware and Architecture top 5%
- Artificial Intelligence top 10%
- Computational Theory and Mathematics top 5%
- Topics
- VLSI and FPGA Design Techniques (5 papers)VLSI and Analog Circuit Testing (5 papers)Interconnection Networks and Systems (4 papers)
- Cited by
- Hardware and ArchitectureComputer Networks and CommunicationsComputer Graphics and Computer-Aided Design
- Journals
- Proceedings of the IEEEIEEE Transactions on Computer-Aided Design of Integrated Circuits and SystemsComputer-Aided Design
- Partner nations
- United StatesFinland
In The Last Decade
Richard N. Pelavin
10 papers receiving 557 citations
Peers
Comparison fields: 5 of 59
- Electrical and Electronic Engineering 380
- Computer Networks and Communications 278
- Hardware and Architecture 239
- Artificial Intelligence 185
- Computational Theory and Mathematics 88
Countries citing papers authored by Richard N. Pelavin
This map shows the geographic impact of Richard N. Pelavin's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Richard N. Pelavin with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Richard N. Pelavin more than expected).
Fields of papers citing papers by Richard N. Pelavin
This network shows the impact of papers produced by Richard N. Pelavin. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Richard N. Pelavin. The network helps show where Richard N. Pelavin may publish in the future.
Co-authorship network of co-authors of Richard N. Pelavin
This figure shows the co-authorship network connecting the top 25 collaborators of Richard N. Pelavin. A scholar is included among the top collaborators of Richard N. Pelavin based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Richard N. Pelavin. Richard N. Pelavin is excluded from the visualization to improve readability, since they are connected to all nodes in the network.
All Works
| # | Work | Indexed citations |
|---|---|---|
| 1 | Spreadsheet-like design through knowledge-based tool integration | 4 |
| 2 | Reasoning About Plans | 167 |
| 3 | A formal approach to planning with concurrent actions and external events | 17 |
| 4 | A model for concurrent actions having temporal extent | 13 |
| 5 | 31 | |
| 6 | 7 | |
| 7 | 90 | |
| 8 | 211 | |
| 9 | 55 | |
| 10 | 43 |
About Richard N. Pelavin
Richard N. Pelavin is a scholar working on Hardware and Architecture, Software and Computer Networks and Communications, having authored 10 papers that have together received 638 indexed citations. Recurring topics across this work include VLSI and FPGA Design Techniques (5 papers), VLSI and Analog Circuit Testing (5 papers) and Interconnection Networks and Systems (4 papers). The work is most often cited by research in Hardware and Architecture (239 citations), Computer Networks and Communications (278 citations) and Computer Graphics and Computer-Aided Design (28 citations). Richard N. Pelavin has collaborated with scholars based in United States and Finland. Frequent co-authors include Michael Burstein, James F. Allen, Ronald J. Brachman, Henry Kautz, Josh Tenenberg and Jay C. Weber. Their work appears in journals such as Proceedings of the IEEE, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems and Computer-Aided Design.
Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.