R. Senthinathan

1.2k total citations
32 papers, 860 citations indexed

About

R. Senthinathan is a scholar working on Electrical and Electronic Engineering, Biomedical Engineering and Hardware and Architecture. According to data from OpenAlex, R. Senthinathan has authored 32 papers receiving a total of 860 indexed citations (citations by other indexed papers that have themselves been cited), including 31 papers in Electrical and Electronic Engineering, 6 papers in Biomedical Engineering and 4 papers in Hardware and Architecture. Recurrent topics in R. Senthinathan's work include Electromagnetic Compatibility and Noise Suppression (16 papers), Advancements in PLL and VCO Technologies (13 papers) and Low-power high-performance VLSI design (11 papers). R. Senthinathan is often cited by papers focused on Electromagnetic Compatibility and Noise Suppression (16 papers), Advancements in PLL and VCO Technologies (13 papers) and Low-power high-performance VLSI design (11 papers). R. Senthinathan collaborates with scholars based in United States and United Kingdom. R. Senthinathan's co-authors include J.L. Prince, William J. Dally, John L. Prince, R. Farjad-Rad, John W. Poulton, Hiok-Tiaq Ng, R. Rathi, Thomas H. Greer, J.H. Edmondson and A.C. Cangellaris and has published in prestigious journals such as IEEE Journal of Solid-State Circuits, IEEE Transactions on Microwave Theory and Techniques and IEEE Transactions on Components Packaging and Manufacturing Technology Part B.

In The Last Decade

R. Senthinathan

26 papers receiving 786 citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name h Career Trend Papers Cites
R. Senthinathan United States 14 846 252 124 36 26 32 860
Baher Haroun United States 15 628 0.7× 262 1.0× 160 1.3× 87 2.4× 10 0.4× 63 710
Jae-Kyung Wee South Korea 10 275 0.3× 61 0.2× 43 0.3× 34 0.9× 29 1.1× 47 320
Rajiv Dunne United States 9 563 0.7× 48 0.2× 84 0.7× 23 0.6× 8 0.3× 11 575
Wanghua Wu United States 14 802 0.9× 210 0.8× 21 0.2× 22 0.6× 31 1.2× 30 834
Gaurab Banerjee India 12 475 0.6× 141 0.6× 58 0.5× 67 1.9× 26 1.0× 55 522
George Chien Taiwan 15 885 1.0× 346 1.4× 23 0.2× 39 1.1× 11 0.4× 28 908
Andrey V. Mezhiba United States 10 444 0.5× 39 0.2× 82 0.7× 44 1.2× 7 0.3× 16 462
Yidnekachew S. Mekonnen United States 6 303 0.4× 30 0.1× 62 0.5× 30 0.8× 12 0.5× 15 337
Jorge Lagos Belgium 14 437 0.5× 331 1.3× 26 0.2× 21 0.6× 16 0.6× 30 453
Mikhail Popovich United States 13 399 0.5× 33 0.1× 54 0.4× 52 1.4× 12 0.5× 27 417

Countries citing papers authored by R. Senthinathan

Since Specialization
Citations

This map shows the geographic impact of R. Senthinathan's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by R. Senthinathan with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites R. Senthinathan more than expected).

Fields of papers citing papers by R. Senthinathan

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by R. Senthinathan. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by R. Senthinathan. The network helps show where R. Senthinathan may publish in the future.

Co-authorship network of co-authors of R. Senthinathan

This figure shows the co-authorship network connecting the top 25 collaborators of R. Senthinathan. A scholar is included among the top collaborators of R. Senthinathan based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with R. Senthinathan. R. Senthinathan is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
1.
Chiang, Patrick Yin, et al.. (2005). A 20-Gb/s 0.13-/spl mu/m CMOS serial link transmitter using an LC-PLL to directly drive the output multiplexer. IEEE Journal of Solid-State Circuits. 40(4). 1004–1011. 17 indexed citations
2.
3.
Farjad-Rad, R., An Nguyen, Thomas H. Greer, et al.. (2004). A 33-mW 8-Gb/s CMOS clock multiplier and CDR for highly integrated I/Os. IEEE Journal of Solid-State Circuits. 39(9). 1553–1561. 30 indexed citations
4.
Chiang, Patrick Yin, et al.. (2004). 20Gb/s 0.13μm CMOS serial link transmitter using an LC-PLL to directly drive the output multiplexer. 37. 272–275. 2 indexed citations
5.
Farjad-Rad, R., R. Senthinathan, William J. Dally, et al.. (2004). 0.622-8.0 Gbps 150 mW serial IO macrocell with fully flexible preemphasis and equalization. 63–66. 38 indexed citations
6.
Dally, William J., John W. Poulton, Thomas H. Greer, et al.. (2003). A second-order semi-digital clock recovery circuit based on injection locking. 1. 74–75. 10 indexed citations
7.
8.
Ng, Hiok-Tiaq, R. Farjad-Rad, William J. Dally, et al.. (2003). A second-order semidigital clock recovery circuit based on injection locking. IEEE Journal of Solid-State Circuits. 38(12). 2101–2110. 42 indexed citations
9.
Senthinathan, R., et al.. (2003). Negative feedback influence on simultaneous switching CMOS outputs. 5.4/1–5.4/5. 11 indexed citations
10.
Senthinathan, R., et al.. (2002). Effects of skewing CMOS output driver switching on the 'simultaneous' switching noise. 342–345. 5 indexed citations
11.
12.
Farjad-Rad, R., William J. Dally, Hiok-Tiaq Ng, et al.. (2002). A low-power multiplying DLL for low-jitter multigigahertz clock generation in highly integrated digital chips. IEEE Journal of Solid-State Circuits. 37(12). 1804–1812. 158 indexed citations
13.
Senthinathan, R. & J.L. Prince. (2002). Effect of device and interconnect scaling on the performance and noise of packaged CMOS devices. 11.3/1–11.3/5. 7 indexed citations
14.
Senthinathan, R. & John L. Prince. (1994). Simultaneous Switching Noise of CMOS Devices and Systems. 109 indexed citations
15.
Senthinathan, R., et al.. (1994). Electrical packaging requirements for low-voltage ICs-3.3 V high-performance CMOS devices as a case study. IEEE Transactions on Components Packaging and Manufacturing Technology Part B. 17(4). 493–504. 6 indexed citations
16.
Senthinathan, R., A.C. Cangellaris, & J.L. Prince. (1994). Reference plane parasitics modeling and their contribution to the power and ground path "effective" inductance as seen by the output drivers. IEEE Transactions on Microwave Theory and Techniques. 42(9). 1765–1773. 17 indexed citations
17.
Senthinathan, R.. (1992). Signal Integrity and Simultaneous Switching Noise of CMOS Devices and Systems.. UA Campus Repository (The University of Arizona). 2 indexed citations
18.
19.
Senthinathan, R. & J.L. Prince. (1991). Simultaneous switching ground noise calculation for packaged CMOS devices. IEEE Journal of Solid-State Circuits. 26(11). 1724–1728. 141 indexed citations
20.
Senthinathan, R., J.L. Prince, & M. R. Scheinfein. (1987). Characteristics of Coupled Buried Microstrip Lines by Modeling and Simulation. IEEE Transactions on Components Hybrids and Manufacturing Technology. 10(4). 604–611. 7 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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