Jorge Lagos

642 total citations
30 papers, 453 citations indexed

About

Jorge Lagos is a scholar working on Electrical and Electronic Engineering, Biomedical Engineering and Hardware and Architecture. According to data from OpenAlex, Jorge Lagos has authored 30 papers receiving a total of 453 indexed citations (citations by other indexed papers that have themselves been cited), including 29 papers in Electrical and Electronic Engineering, 24 papers in Biomedical Engineering and 3 papers in Hardware and Architecture. Recurrent topics in Jorge Lagos's work include Analog and Mixed-Signal Circuit Design (22 papers), Advancements in Semiconductor Devices and Circuit Design (15 papers) and CCD and CMOS Imaging Sensors (10 papers). Jorge Lagos is often cited by papers focused on Analog and Mixed-Signal Circuit Design (22 papers), Advancements in Semiconductor Devices and Circuit Design (15 papers) and CCD and CMOS Imaging Sensors (10 papers). Jorge Lagos collaborates with scholars based in Belgium, Italy and Macao. Jorge Lagos's co-authors include Ewout Martens, Jan Craninckx, Benjamin Hershberg, Piet Wambacq, Nereo Markulić, Franco Fiori, Barend van Liempd, Rui P. Martins, Chi‐Hang Chan and Ernesto Sánchez and has published in prestigious journals such as IEEE Journal of Solid-State Circuits, IEEE Transactions on Circuits and Systems I Regular Papers and IEEE Transactions on Electromagnetic Compatibility.

In The Last Decade

Jorge Lagos

30 papers receiving 446 citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name h Career Trend Papers Cites
Jorge Lagos Belgium 14 437 331 26 21 16 30 453
Eric Soenen United States 13 302 0.7× 256 0.8× 31 1.2× 32 1.5× 6 0.4× 31 328
Nereo Markulić Belgium 16 570 1.3× 293 0.9× 8 0.3× 17 0.8× 22 1.4× 34 589
Abu Khari A’ain Malaysia 10 285 0.7× 147 0.4× 28 1.1× 10 0.5× 4 0.3× 53 318
Paritosh Bhoraskar United States 7 492 1.1× 469 1.4× 17 0.7× 58 2.8× 9 0.6× 8 513
Scott Puckett United States 8 515 1.2× 472 1.4× 16 0.6× 57 2.7× 9 0.6× 8 536
Huseyin Dinc United States 9 512 1.2× 483 1.5× 16 0.6× 54 2.6× 9 0.6× 12 536
Satoshi Kondo Japan 13 653 1.5× 197 0.6× 17 0.7× 16 0.8× 27 1.7× 22 673
Carroll Speir United States 6 476 1.1× 449 1.4× 10 0.4× 55 2.6× 10 0.6× 7 492
Wouter De Cock Belgium 10 294 0.7× 193 0.6× 17 0.7× 29 1.4× 8 0.5× 32 329
Scott Bardsley United States 9 489 1.1× 471 1.4× 18 0.7× 58 2.8× 6 0.4× 10 507

Countries citing papers authored by Jorge Lagos

Since Specialization
Citations

This map shows the geographic impact of Jorge Lagos's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Jorge Lagos with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Jorge Lagos more than expected).

Fields of papers citing papers by Jorge Lagos

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Jorge Lagos. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Jorge Lagos. The network helps show where Jorge Lagos may publish in the future.

Co-authorship network of co-authors of Jorge Lagos

This figure shows the co-authorship network connecting the top 25 collaborators of Jorge Lagos. A scholar is included among the top collaborators of Jorge Lagos based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Jorge Lagos. Jorge Lagos is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
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Markulić, Nereo, Jorge Lagos, Ewout Martens, et al.. (2023). A 12-bit 1GS/s ADC With Background Distortion and Split-ADC-Like Gain Calibration. IEEE Transactions on Circuits and Systems I Regular Papers. 70(12). 4679–4691. 4 indexed citations
3.
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Martens, Ewout, et al.. (2022). A 950 MHz Clock 47.5 MHz BW 4.7 mW 67 dB SNDR Discrete Time Delta Sigma ADC Leveraging Ring Amplification and Split-Source Comparator Based Quantizer in 28 nm CMOS. IEEE Journal of Solid-State Circuits. 57(7). 2068–2077. 6 indexed citations
5.
Lagos, Jorge, Ewout Martens, Yan Zhu, et al.. (2021). A 3.3-GS/s 6-b Fully Dynamic Pipelined ADC With Linearized Dynamic Amplifier. IEEE Journal of Solid-State Circuits. 57(6). 1673–1683. 14 indexed citations
6.
Martens, Ewout, et al.. (2021). A 47.5MHz BW 4.7mW 67dB SNDR Ringamp Based Discrete-Time Delta Sigma ADC. VUBIR (Vrije Universiteit Brussel). 207–210. 3 indexed citations
7.
Hershberg, Benjamin, Barend van Liempd, Nereo Markulić, et al.. (2021). Asynchronous Event-Driven Clocking and Control in Pipelined ADCs. IEEE Transactions on Circuits and Systems I Regular Papers. 68(7). 2813–2826. 5 indexed citations
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Hershberg, Benjamin, Barend van Liempd, Ewout Martens, et al.. (2019). A 3.2GS/s 10 ENOB 61mW Ringamp ADC in 16nm with Background Monitoring of Distortion.. 58–60. 6 indexed citations
11.
Hershberg, Benjamin, Barend van Liempd, Ewout Martens, et al.. (2019). 3.1 A 3.2GS/s 10 ENOB 61mW Ringamp ADC in 16nm with Background Monitoring of Distortion. 58–60. 33 indexed citations
12.
Lagos, Jorge, Benjamin Hershberg, Ewout Martens, Piet Wambacq, & Jan Craninckx. (2019). A 1-GS/s, 12-b, Single-Channel Pipelined ADC With Dead-Zone-Degenerated Ring Amplifiers. IEEE Journal of Solid-State Circuits. 54(3). 646–658. 59 indexed citations
13.
Hershberg, Benjamin, Barend van Liempd, Nereo Markulić, et al.. (2019). 3.6 A 6-to-600MS/s Fully Dynamic Ringamp Pipelined ADC with Asynchronous Event-Driven Clocking in 16nm. 68–70. 18 indexed citations
14.
Lagos, Jorge, Benjamin Hershberg, Ewout Martens, Piet Wambacq, & Jan Craninckx. (2017). A single-channel, 600Msps, 12bit, ringamp-based pipelined ADC in 28nm CMOS. VUBIR (Vrije Universiteit Brussel). C96–C97. 24 indexed citations
15.
Zhou, Huan‐Li, et al.. (2015). A versatile analog front-end for sensors based on piezoresistive silicon nanowire detection. Fraunhofer-Publica (Fraunhofer-Gesellschaft). 666–669. 7 indexed citations
16.
Bernardi, Paolo, Maurício Carvalho, Michelangelo Grosso, et al.. (2012). On-line software-based self-test of the Address Calculation Unit in RISC processors. 1–6. 21 indexed citations
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Lagos, Jorge, et al.. (2011). A Low-Cost Emulation System for Fast Co-verification and Debug. 212–212. 2 indexed citations
19.
Lagos, Jorge & Franco Fiori. (2010). Worst Case-Induced Disturbances in Microstrip Interchip Interconnects by an External Electromagnetic Plane Wave—Part II: Analysis and Validation. IEEE Transactions on Electromagnetic Compatibility. 53(2). 491–500. 18 indexed citations
20.
Lagos, Jorge, D. Appello, Paolo Bernardi, et al.. (2007). An Effective Approach for the Diagnosis of Transition-Delay Faults in SoCs, based on SBST and Scan Chains. 20. 291–302. 2 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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