Pete Sedcole
- Hardware and Architecture top 1%
- Electrical and Electronic Engineering top 10%
- Computer Networks and Communications top 5%
- Cellular and Molecular Neuroscience
- Artificial Intelligence
- Co-authors
- Peter Y. K. CheungJustin S. J. WongEdward StottBrandon BlodgetPatrick LysaghtTobias BeckerJason H. AndersonWayne Luk
- Topics
- VLSI and FPGA Design Techniques (14 papers)VLSI and Analog Circuit Testing (14 papers)Low-power high-performance VLSI design (13 papers)
- Cited by
- Hardware and ArchitectureElectrical and Electronic EngineeringComputer Networks and Communications
- Journals
- Electronics LettersIEEE Transactions on Very Large Scale Integration (VLSI) SystemsIntegration
- Partner nations
- United KingdomUnited StatesAustralia
In The Last Decade
Pete Sedcole
24 papers receiving 587 citations
Peers
Comparison fields: 5 of 35
- Hardware and Architecture 510
- Electrical and Electronic Engineering 470
- Computer Networks and Communications 167
- Cellular and Molecular Neuroscience 43
- Artificial Intelligence 27
Countries citing papers authored by Pete Sedcole
This map shows the geographic impact of Pete Sedcole's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Pete Sedcole with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Pete Sedcole more than expected).
Fields of papers citing papers by Pete Sedcole
This network shows the impact of papers produced by Pete Sedcole. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Pete Sedcole. The network helps show where Pete Sedcole may publish in the future.
Co-authorship network of co-authors of Pete Sedcole
This figure shows the co-authorship network connecting the top 25 collaborators of Pete Sedcole. A scholar is included among the top collaborators of Pete Sedcole based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Pete Sedcole. Pete Sedcole is excluded from the visualization to improve readability, since they are connected to all nodes in the network.
All Works
| # | Work | Indexed citations |
|---|---|---|
| 1 | 15 | |
| 2 | 80 | |
| 3 | 8 | |
| 4 | 6 | |
| 5 | 9 | |
| 6 | 12 | |
| 7 | 6 | |
| 8 | 4 | |
| 9 | 15 | |
| 10 | 45 | |
| 11 | 3 | |
| 12 | 6 | |
| 13 | 4 | |
| 14 | 19 | |
| 15 | 21 | |
| 16 | 9 | |
| 17 | 19 | |
| 18 | 119 | |
| 19 | 103 | |
| 20 | 52 |
About Pete Sedcole
Pete Sedcole is a scholar working on Hardware and Architecture, Computer Networks and Communications and Electrical and Electronic Engineering, having authored 25 papers that have together received 628 indexed citations. Recurring topics across this work include VLSI and FPGA Design Techniques (14 papers), VLSI and Analog Circuit Testing (14 papers) and Low-power high-performance VLSI design (13 papers). The work is most often cited by research in Hardware and Architecture (510 citations), Electrical and Electronic Engineering (470 citations) and Computer Networks and Communications (167 citations). Pete Sedcole has collaborated with scholars based in United Kingdom, United States and Australia. Frequent co-authors include Peter Y. K. Cheung, Justin S. J. Wong, Edward Stott, Brandon Blodget, Patrick Lysaght, Tobias Becker, Jason H. Anderson, Wayne Luk, George A. Constantinides and Wayne Luk. Their work appears in journals such as Electronics Letters, IEEE Transactions on Very Large Scale Integration (VLSI) Systems and Integration.
Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.