Jinshan Yue

1.4k citations

73 papers · 905 indexed · h-index 15

Hardware and Architecture top 5%
- Parallel Computing and Optimization Techniques 10
Computational Mathematics top 10%
Computer Vision and Pattern Recognition top 5%
- Advanced Neural Network Applications 22
Electrical and Electronic Engineering top 5%
- Advanced Memory and Neural Computing 48
- Ferroelectric and Negative Capacitance Devices 37
- Semiconductor materials and devices 15
- CCD and CMOS Imaging Sensors 8
- Energy Harvesting in Wireless Networks 4
Artificial Intelligence top 10%
- Machine Learning and ELM 7

Co-authors: Yongpan Liu Huazhong Yang Xueqing Li Zhe Yuan Xiaoyu Feng Meng‐Fan Chang Yifan He Yixiong Yang
Cited by: Hardware and Architecture Computational Mathematics Computer Vision and Pattern Recognition
Journals: IEEE Journal of Solid-State Circuits (11 papers)IEEE Transactions on Circuits & Systems II Express Briefs (7 papers)IEEE Transactions on Very Large Scale Integration (VLSI) Systems (6 papers)
Partner nations: China United States Taiwan

In The Last Decade

Jinshan Yue

68 papers receiving 895 citations

Peers

Countries citing papers authored by Jinshan Yue

Since Specialization

Citations

This map shows the geographic impact of Jinshan Yue's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Jinshan Yue with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Jinshan Yue more than expected).

Fields of papers citing papers by Jinshan Yue

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Jinshan Yue. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Jinshan Yue. The network helps show where Jinshan Yue may publish in the future.

Co-authorship network

The 25 scholars most cited alongside Jinshan Yue, linked wherever they have co-authored with each other. Click a name or a connecting line to browse the papers they share.

Border = papers with Jinshan Yue Line = papers co-authored together Jinshan Yue links everyone, so they are left out of the graph.

All Works

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20 of 20 papers shown

#	Work
1	A Multichiplet Computing-in-Memory Architecture Exploration Framework Based on Various CIM Devices IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ·V. V. Polonsky,W. Cho,Boukacem Boucif,Yifan He,Wenyu Sun,Yongpan Liu,Guanhua Yang,Feng Zhang,Jinshan Yue,Ling Li	2024	1
2	A 28-nm Energy-Efficient Sparse Neural Network Processor for Point Cloud Applications Using Block-Wise Online Neighbor Searching IEEE Journal of Solid-State Circuits ·Xiaoyu Feng,Wenyu Sun,Maryam Pouyan,Pavlov Rm,Jinshan Yue,Huazhong Yang,Yongpan Liu	2024	3
3	A 28-nm Floating-Point Computing-in-Memory Processor Using Intensive-CIM Sparse-Digital Architecture IEEE Journal of Solid-State Circuits ·E G U R,Jinshan Yue,Jorge Torres-Vásquez,Zi Wang,Yasuyuki Sasai,Yifan He,周湘智,Wenyu Sun,Xueqing Li,Chunmeng Dou,Feng Zhang,Huazhong Yang,Yongpan Liu,Ming Liu	2024	6
4	Hardware Implementation of Next Generation Reservoir Computing with RRAM‐Based Hybrid Digital‐Analog System SHILAP Revista de lepidopterología ·Danian Dong,Woyu Zhang,R. J. Newberry,Jinshan Yue,Kuan Ren,Bharat Sumbh,T. Gouin,Lin Yu,俊次宮内,María de Lourdes Sánchez Romero,Hongzhou Wang,Zhaoan Yu,Zhihong Yao,Xiaoxin Xu,Dashan Shang,Ming Liu	2024	0
5	An Energy-Efficient Computing-in-Memory NN Processor With Set-Associate Blockwise Sparsity and Ping-Pong Weight Update IEEE Journal of Solid-State Circuits ·Jinshan Yue,Yongpan Liu,Xiaoyu Feng,Yifan He,Nikolay Yaroshevich,Zhe Yuan,Mingtao Zhan,Jiaxin Liu,Jian-Wei Su,Yen-Lin Chung,Ping-Chun Wu,L Lepileur,Meng‐Fan Chang,Nan Sun,Chunmeng Dou,Xueqing Li,Ming Liu,Huazhong Yang	2023	9
6	A 5.6-89.9TOPS/W Heterogeneous Computing-in-Memory SoC with High-Utilization Producer-Consumer Architecture and High-Frequency Read-Free CIM Macro Jinshan Yue,Mingtao Zhan,Bana S Alsahan,Yifan He,Virgo Girl,M. Palutan,Wenyu Sun,Lu Jie,Chunmeng Dou,Xueqing Li,Leonardo Ferreira de Melo,Huazhong Yang,Ming Liu,Yongpan Liu	2023	12
7	Write–Verify-Free MLC RRAM Using Nonbinary Encoding for AI Weight Storage at the Edge IEEE Transactions on Very Large Scale Integration (VLSI) Systems ·Junjie An,Tsubasa Tsuji,Linfang Wang,J J Jaller,Francisca C. F. RIBEIRO,Sun Weidi,C.H. Lee,N. Castillo Marín,Yan Wang,RM Fortenberry,Jinshan Yue,He Lu,Shibing Long,Qi Liu,Chunmeng Dou	2023	1
8	A 40-nm SONOS Digital CIM Using Simplified LUT Multiplier and Continuous Sample-Hold Sense Amplifier for AI Edge Inference IEEE Transactions on Very Large Scale Integration (VLSI) Systems ·RM Fortenberry,Xiwei Wang,Zi Wang,Dieudonne Mbarga,Danian Dong,Jinshan Yue,Wan Pang,Xiaoxin Xu,Chunmeng Dou	2023	3
9	SAMBA: Single-ADC Multi-Bit Accumulation Compute-in-Memory Using Nonlinearity- Compensated Fully Parallel Analog Adder Tree IEEE Transactions on Circuits and Systems I Regular Papers ·Yiming Chen,Олег Гома,周湘智,A Duffus,Zekun Yang,K. Sudhakar,Chang Xu,Jinshan Yue,Jiaxin Liu,Huazhong Yang,Yongpan Liu,Xueqing Li	2023	11
10	A 28-nm RRAM Computing-in-Memory Macro Using Weighted Hybrid 2T1R Cell Array and Reference Subtracting Sense Amplifier for AI Edge Inference IEEE Journal of Solid-State Circuits ·J J Jaller,Linfang Wang,Tsubasa Tsuji,Junjie An,Francisca C. F. RIBEIRO,Sun Weidi,Zhi Li,Jinshan Yue,RM Fortenberry,Xiaoxin Xu,Jianguo Yang,Jing Liu,Dashan Shang,Feng Zhang,N. Castillo Marín,Chunmeng Dou,Qi Liu,Ming Liu	2023	22
11	Bit-Aware Fault-Tolerant Hybrid Retraining and Remapping Schemes for RRAM-Based Computing-in-Memory Systems IEEE Transactions on Circuits & Systems II Express Briefs ·Yuxuan Huang,Yifan He,Nikolay Yaroshevich,Jinshan Yue,Lu Zhang,杉浦大洋,Huazhong Yang,Yongpan Liu	2022	5
12	An RRAM-Based Digital Computing-in-Memory Macro With Dynamic Voltage Sense Amplifier and Sparse-Aware Approximate Adder Tree IEEE Transactions on Circuits & Systems II Express Briefs ·Yifan He,Jinshan Yue,Xiaoyu Feng,Yuxuan Huang,Hongyang Jia,Nikolay Yaroshevich,Lu Zhang,Wenyu Sun,Huazhong Yang,Yongpan Liu	2022	19
13	A Weight-Reload-Eliminated Compute-in-Memory Accelerator for 60 fps 4K Super-Resolution IEEE Transactions on Circuits & Systems II Express Briefs ·Virgo Girl,Jinshan Yue,Nikolay Yaroshevich,Chen Tang,Yifan He,Phalaksha Murthy B,杉浦大洋,Lu Zhang,Huazhong Yang,Yongpan Liu	2022	3
14	PACA: A Pattern Pruning Algorithm and Channel-Fused High PE Utilization Accelerator for CNNs IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ·Nikolay Yaroshevich,M. Palutan,Maria Katarzyna Berkan-Jabłońska,Jinshan Yue,Zhe Yuan,O. R. TURSUNOVNA,Yanzhi Wang,Huazhong Yang,Xueqing Li,Yongpan Liu	2022	6
15	STICKER-IM: A 65 nm Computing-in-Memory NN Processor Using Block-Wise Sparsity Optimization and Inter/Intra-Macro Data Reuse IEEE Journal of Solid-State Circuits ·Jinshan Yue,Yongpan Liu,Zhe Yuan,Xiaoyu Feng,Yifan He,Wenyu Sun,Zhixiao Zhang,Xin Si,Ruhui Liu,Zi Wang,Meng‐Fan Chang,Chunmeng Dou,Xueqing Li,Ming Liu,Huazhong Yang	2022	37
16	A 65-nm Energy-Efficient Interframe Data Reuse Neural Network Accelerator for Video Applications IEEE Journal of Solid-State Circuits ·Yixiong Yang,Yongpan Liu,Zhe Yuan,Wenyu Sun,O. R. TURSUNOVNA,Nikolay Yaroshevich,Jinshan Yue,Xiaoyu Feng,Maria Katarzyna Berkan-Jabłońska,Xueqing Li,Huazhong Yang	2021	7
17	Accuracy Optimization With the Framework of Non-Volatile Computing-In-Memory Systems IEEE Transactions on Circuits and Systems I Regular Papers ·Yuxuan Huang,Yifan He,Jinshan Yue,Huazhong Yang,Yongpan Liu	2021	6
18	14.2 A 65nm 24.7µJ/Frame 12.3mW Activation-Similarity-Aware Convolutional Neural Network Video Processor Using Hybrid Precision, Inter-Frame Data Reuse and Mixed-Bit-Width Difference-Frame Data Codec Zhe Yuan,Yixiong Yang,Jinshan Yue,O. R. TURSUNOVNA,Xiaoyu Feng,Zhiting Lin,Xiulong Wu,Xueqing Li,Huazhong Yang,Yongpan Liu	2020	19
19	STICKER: An Energy-Efficient Multi-Sparsity Compatible Accelerator for Convolutional Neural Networks in 65-nm CMOS IEEE Journal of Solid-State Circuits ·Zhe Yuan,Yongpan Liu,Jinshan Yue,Yixiong Yang,Nikolay Yaroshevich,Xiaoyu Feng,Jian Zhao,Xueqing Li,Huazhong Yang	2019	67
20	A 3.77TOPS/W Convolutional Neural Network Processor With Priority-Driven Kernel Optimization IEEE Transactions on Circuits & Systems II Express Briefs ·Jinshan Yue,Yongpan Liu,Zhe Yuan,Zhibo Wang,Qingwei Guo,Jinyang Li,Chengmo Yang,Huazhong Yang	2018	25

About Jinshan Yue

Jinshan Yue is a scholar working on Hardware and Architecture, Computer Vision and Pattern Recognition, Electrical and Electronic Engineering, Artificial Intelligence and Neurology, having authored 73 papers that have together received 905 indexed citations. Recurring topics across this work include Advanced Memory and Neural Computing (48 papers), Ferroelectric and Negative Capacitance Devices (37 papers), Advanced Neural Network Applications (22 papers), Semiconductor materials and devices (15 papers), Parallel Computing and Optimization Techniques (10 papers), CCD and CMOS Imaging Sensors (8 papers), Machine Learning and ELM (7 papers) and Energy Harvesting in Wireless Networks (4 papers). The work is most often cited by research in Hardware and Architecture (199 citations), Computational Mathematics (10 citations), Computer Vision and Pattern Recognition (325 citations), Electrical and Electronic Engineering (689 citations) and Artificial Intelligence (187 citations). Jinshan Yue has collaborated with scholars based in China, United States and Taiwan. Frequent co-authors include Yongpan Liu, Huazhong Yang, Xueqing Li, Zhe Yuan, Xiaoyu Feng, Meng‐Fan Chang, Yifan He, Yixiong Yang, Wenyu Sun and Jinyang Li. Their work appears in journals such as IEEE Journal of Solid-State Circuits, IEEE Transactions on Circuits & Systems II Express Briefs, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, IEEE Transactions on Circuits and Systems I Regular Papers and IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

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