Zhiting Lin

1.3k total citations
99 papers, 877 citations indexed

About

Zhiting Lin is a scholar working on Electrical and Electronic Engineering, Hardware and Architecture and Computer Networks and Communications. According to data from OpenAlex, Zhiting Lin has authored 99 papers receiving a total of 877 indexed citations (citations by other indexed papers that have themselves been cited), including 85 papers in Electrical and Electronic Engineering, 27 papers in Hardware and Architecture and 15 papers in Computer Networks and Communications. Recurrent topics in Zhiting Lin's work include Advanced Memory and Neural Computing (35 papers), Semiconductor materials and devices (31 papers) and Ferroelectric and Negative Capacitance Devices (27 papers). Zhiting Lin is often cited by papers focused on Advanced Memory and Neural Computing (35 papers), Semiconductor materials and devices (31 papers) and Ferroelectric and Negative Capacitance Devices (27 papers). Zhiting Lin collaborates with scholars based in China, United States and Japan. Zhiting Lin's co-authors include Xiulong Wu, Chunyu Peng, Junning Chen, Liang Dong, Qiang Zhao, Wenjuan Lu, Changyong Liu, Xuan Zeng, Costas J. Spanos and Linda Milor and has published in prestigious journals such as Sensors, IEEE Journal of Solid-State Circuits and IEEE Transactions on Knowledge and Data Engineering.

In The Last Decade

Zhiting Lin

84 papers receiving 841 citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name h Career Trend Papers Cites
Zhiting Lin China 16 697 234 150 73 68 99 877
Midia Reshadi Iran 14 342 0.5× 167 0.7× 417 2.8× 99 1.4× 94 1.4× 96 675
Arindam Mallik Belgium 16 347 0.5× 194 0.8× 153 1.0× 40 0.5× 32 0.5× 41 527
Mengying Zhao China 18 519 0.7× 436 1.9× 524 3.5× 58 0.8× 84 1.2× 80 980
Ryan Kim United States 15 330 0.5× 188 0.8× 301 2.0× 48 0.7× 22 0.3× 49 590
Cesar Albenes Zeferino Brazil 16 355 0.5× 523 2.2× 601 4.0× 75 1.0× 62 0.9× 63 879
Abdel‐Hameed A. Badawy United States 14 258 0.4× 218 0.9× 195 1.3× 152 2.1× 42 0.6× 93 550
Jason Luu Canada 13 997 1.4× 929 4.0× 297 2.0× 60 0.8× 18 0.3× 20 1.2k
Basel Halak United Kingdom 13 375 0.5× 332 1.4× 121 0.8× 107 1.5× 93 1.4× 92 613
Kun-Chih Chen Taiwan 16 451 0.6× 189 0.8× 368 2.5× 51 0.7× 15 0.2× 76 728
Ahmad Patooghy Iran 16 635 0.9× 388 1.7× 595 4.0× 102 1.4× 108 1.6× 115 1.0k

Countries citing papers authored by Zhiting Lin

Since Specialization
Citations

This map shows the geographic impact of Zhiting Lin's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Zhiting Lin with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Zhiting Lin more than expected).

Fields of papers citing papers by Zhiting Lin

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Zhiting Lin. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Zhiting Lin. The network helps show where Zhiting Lin may publish in the future.

Co-authorship network of co-authors of Zhiting Lin

This figure shows the co-authorship network connecting the top 25 collaborators of Zhiting Lin. A scholar is included among the top collaborators of Zhiting Lin based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Zhiting Lin. Zhiting Lin is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
1.
Zhao, Qiang, Licai Hao, Chunyu Peng, et al.. (2025). A double-modules interlocking triple-node upset-tolerant latch design. Microelectronics Journal. 159. 106647–106647.
2.
Zhang, Jianhao, Ruixuan Wang, Junbo Chen, et al.. (2025). A PVT-insensitive 7T SRAM CIM macro for multibit multiplication with dynamic matching quantization circuits. Microelectronics Journal. 161. 106703–106703.
3.
Li, Xin, et al.. (2025). Full-Array Boolean Logic CIM Macro With Self-Recycling 10T-SRAM Cell for AES Systems. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 33(8). 2214–2224.
4.
Li, Xin, et al.. (2025). High-Efficiency Calibration Methodology of Interchannel Mismatches in TIADCs Based on Digital Orthogonal Local Oscillation Signal. IEEE Transactions on Instrumentation and Measurement. 74. 1–11. 1 indexed citations
5.
Zhao, Qiang, Chunhai Fan, Ziming Wang, et al.. (2024). An 11-bit two-step column-shared ADC based on Flash/SS architecture for CMOS image sensor. Microelectronics Journal. 154. 106444–106444. 4 indexed citations
6.
Lin, Zhiting, Da Huo, Yanchun Liu, et al.. (2024). A 28-nm 9T SRAM-based CIM macro with capacitance weighting module and redundant array-assisted ADC. Microelectronics Journal. 153. 106397–106397. 2 indexed citations
7.
Zhao, Qiang, Licai Hao, Chunyu Peng, et al.. (2024). Design of polarity hardening SRAM for mitigating single event multiple node upsets. Microelectronics Journal. 149. 106214–106214. 1 indexed citations
8.
Wu, Xiulong, Yongliang Zhou, Chunyu Peng, et al.. (2024). Configurable in-memory computing architecture based on dual-port SRAM. Microelectronics Journal. 147. 106163–106163. 2 indexed citations
9.
Wang, Hao, et al.. (2024). A Computing In-Memory Multibit Multiplication Based on Decoupling and In-Array Storing. IEEE Transactions on Circuits and Systems I Regular Papers. 71(8). 3658–3671.
10.
Hao, Licai, Xinyi Zhang, Yang Li, et al.. (2024). Low-Cost and Highly Robust Quadruple Node Upset Tolerant Latch Design. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 32(5). 883–896. 8 indexed citations
11.
Shi, Qi, Hao Zheng, Wenjuan Lu, et al.. (2023). Bit-line leakage current tracking and self-compensation circuit for SRAM reliability design. Microelectronics Journal. 132. 105699–105699. 4 indexed citations
12.
Hao, Licai, Li Liu, Qi Shi, et al.. (2023). Design of radiation-hardened memory cell by polar design for space applications. Microelectronics Journal. 132. 105691–105691. 8 indexed citations
13.
Lin, Zhiting, Guangdong Li, Ruixuan Wang, et al.. (2023). Configurable and High-Throughput CIM SRAM for Boolean Logic Operation With 321 GOPS/kb and 164395.6 GOPS/mm2. IEEE Solid-State Circuits Letters. 6. 153–156. 5 indexed citations
14.
Tang, Hao, Yuezhe Li, Zhiting Lin, et al.. (2023). A High Throughput In-MRAM-Computing Scheme Using Hybrid p-SOT-MTJ/GAA-CNTFET. IEEE Transactions on Circuits and Systems I Regular Papers. 71(2). 606–619. 15 indexed citations
15.
Lin, Zhiting, Jianping Xia, Yunwei Liu, et al.. (2023). A Fully Digital SRAM-Based Four-Layer In-Memory Computing Unit Achieving Multiplication Operations and Results Store. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 31(6). 776–788. 12 indexed citations
16.
Lin, Zhiting, Xiulong Wu, Qiang Zhao, et al.. (2022). Configurable Memory With a Multilevel Shared Structure Enabling In-Memory Computing. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 30(5). 566–578. 7 indexed citations
17.
Lin, Zhiting, Fang‐Ming Wang, Peng Sun, et al.. (2022). In Situ Storing 8T SRAM-CIM Macro for Full-Array Boolean Logic and Copy Operations. IEEE Journal of Solid-State Circuits. 58(5). 1472–1486. 17 indexed citations
18.
19.
Lin, Zhiting, Panpan Chen, Le Ye, et al.. (2020). Challenges and Solutions of the TFET Circuit Design. IEEE Transactions on Circuits and Systems I Regular Papers. 67(12). 4918–4931. 21 indexed citations
20.
Peng, Chunyu, et al.. (2020). Reverse Bias Current Eliminated, Read-Separated, and Write-Enhanced Tunnel FET SRAM. IEEE Transactions on Circuits & Systems II Express Briefs. 68(1). 466–470. 5 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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