H. Shiga

1.2k total citations · 1 hit paper
13 papers, 738 citations indexed

About

H. Shiga is a scholar working on Electrical and Electronic Engineering, Biomedical Engineering and Computer Networks and Communications. According to data from OpenAlex, H. Shiga has authored 13 papers receiving a total of 738 indexed citations (citations by other indexed papers that have themselves been cited), including 13 papers in Electrical and Electronic Engineering, 4 papers in Biomedical Engineering and 3 papers in Computer Networks and Communications. Recurrent topics in H. Shiga's work include Advanced Memory and Neural Computing (6 papers), Ferroelectric and Negative Capacitance Devices (6 papers) and Semiconductor materials and devices (6 papers). H. Shiga is often cited by papers focused on Advanced Memory and Neural Computing (6 papers), Ferroelectric and Negative Capacitance Devices (6 papers) and Semiconductor materials and devices (6 papers). H. Shiga collaborates with scholars based in Japan and United States. H. Shiga's co-authors include Akira Umezawa, S. Atsumi, T. Miyaba, Tôru Tanzawa, H. Banba, Koji Sakui, S. Shiratake, D. Takashima, A. Nitayama and I. Kunishima and has published in prestigious journals such as IEEE Journal of Solid-State Circuits, Advanced Optical Materials and IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

In The Last Decade

H. Shiga

12 papers receiving 691 citations

Hit Papers

A CMOS bandgap reference circuit with sub-1-V operation 1999 2026 2008 2017 1999 200 400 600
What are hit papers?

Hit papers significantly outperform the citation benchmark for their cohort. A paper qualifies if it has ≥500 total citations, achieves ≥1.5× the top-1% citation threshold for papers in the same subfield and year (this is the minimum needed to enter the top 1%, not the average within it), or reaches the top citation threshold in at least one of its specific research topics.

  1. A CMOS bandgap reference circuit with sub-1-V operation
    1999 638 citations H. Banba, H. Shiga et al. IEEE Journal of Solid-State Circuits profile →

Peers

H. Shiga
T. Miyaba Japan
H. Banba Japan
Tai‐Cheng Lee Taiwan
S. Parke United States
C. Lyden Ireland
S. Atsumi Japan
Fule Li China
R.J. Widlar United States
Amy Brokaw United States
Hamilton Klimach Brazil
T. Miyaba Japan
H. Shiga
Citations per year, relative to H. Shiga H. Shiga (= 1×) peers T. Miyaba

Countries citing papers authored by H. Shiga

Since Specialization
Citations

This map shows the geographic impact of H. Shiga's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by H. Shiga with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites H. Shiga more than expected).

Fields of papers citing papers by H. Shiga

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by H. Shiga. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by H. Shiga. The network helps show where H. Shiga may publish in the future.

Co-authorship network of co-authors of H. Shiga

This figure shows the co-authorship network connecting the top 25 collaborators of H. Shiga. A scholar is included among the top collaborators of H. Shiga based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with H. Shiga. H. Shiga is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

13 of 13 papers shown
1.
2.
Takashima, D., et al.. (2015). Highly Reliable Reference Bitline Bias Designs for 64 Mb and 128 Mb Chain FeRAMs. IEEE Journal of Solid-State Circuits. 50(5). 1324–1331. 5 indexed citations
3.
Takashima, D., H. Shiga, Daisuke Hashimoto, et al.. (2011). A Scalable Shield-Bitline-Overdrive Technique for Sub-1.5 V Chain FeRAMs. IEEE Journal of Solid-State Circuits. 46(9). 2171–2179. 2 indexed citations
4.
Takashima, D., et al.. (2010). Highly relaible reference bitline bias designs for 64Mb and 128Mb chain FeRAMs. 1–4. 3 indexed citations
5.
Takashima, D., H. Shiga, Daisuke Hashimoto, et al.. (2010). A scalable shield-bitline-overdrive technique for 1.3V Chain FeRAM. 262–263. 13 indexed citations
6.
Takashima, D., S. Shiratake, H. Shiga, et al.. (2009). A 64-Mb Chain FeRAM With Quad BL Architecture and 200 MB/s Burst Mode. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 18(12). 1745–1752. 17 indexed citations
7.
Takashima, D., S. Shiratake, H. Shiga, et al.. (2006). A 64Mb Chain FeRAM with Quad-BL Architecture and 200MB/s Burst Mode. 459–466. 15 indexed citations
8.
Shiga, H., Tôru Tanzawa, Akira Umezawa, et al.. (2003). A sampling weak-program method to tighten Vth-distribution of 0.5 V for low-voltage flash memories. 33–36. 3 indexed citations
9.
Tanzawa, Tôru, Akira Umezawa, H. Shiga, et al.. (2002). A 44-mm/sup 2/ four-bank eight-word page-read 64-Mb flash memory with flexible block redundancy and fast accurate word-line voltage controller. IEEE Journal of Solid-State Circuits. 37(11). 1485–1492. 2 indexed citations
10.
Atsumi, S., Akihiro Umezawa, Tôru Tanzawa, et al.. (2002). A channel-erasing 1.8 V-only 32 Mb NOR flash EEPROM with a bit-line direct-sensing scheme. 276–277,. 4 indexed citations
11.
Tanzawa, Tôru, Akira Umezawa, M. Kuriyama, et al.. (2001). Wordline voltage generating system for low-power low-voltage flash memories. IEEE Journal of Solid-State Circuits. 36(1). 55–63. 18 indexed citations
12.
Atsumi, S., Akira Umezawa, Tôru Tanzawa, et al.. (2000). A channel-erasing 1.8-V-only 32-Mb NOR flash EEPROM with a bitline direct sensing scheme. IEEE Journal of Solid-State Circuits. 35(11). 1648–1654. 18 indexed citations
13.
Banba, H., H. Shiga, Akira Umezawa, et al.. (1999). A CMOS bandgap reference circuit with sub-1-V operation. IEEE Journal of Solid-State Circuits. 34(5). 670–674. 638 indexed citations breakdown →

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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