Fule Li

1.3k total citations
111 papers, 519 citations indexed

About

Fule Li is a scholar working on Electrical and Electronic Engineering, Biomedical Engineering and Computer Networks and Communications. According to data from OpenAlex, Fule Li has authored 111 papers receiving a total of 519 indexed citations (citations by other indexed papers that have themselves been cited), including 102 papers in Electrical and Electronic Engineering, 87 papers in Biomedical Engineering and 15 papers in Computer Networks and Communications. Recurrent topics in Fule Li's work include Analog and Mixed-Signal Circuit Design (83 papers), CCD and CMOS Imaging Sensors (54 papers) and Advancements in Semiconductor Devices and Circuit Design (39 papers). Fule Li is often cited by papers focused on Analog and Mixed-Signal Circuit Design (83 papers), CCD and CMOS Imaging Sensors (54 papers) and Advancements in Semiconductor Devices and Circuit Design (39 papers). Fule Li collaborates with scholars based in China, United Kingdom and Singapore. Fule Li's co-authors include Zhihua Wang, Chun Zhang, Xiao Wang, Hanjun Jiang, Xuqiang Zheng, Shigang Yue, Feng Zhao, Weitao Li, Zhijun Wang and Changyi Yang and has published in prestigious journals such as IEEE Transactions on Industrial Electronics, IEEE Journal of Solid-State Circuits and Electronics Letters.

In The Last Decade

Fule Li

97 papers receiving 493 citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name h Career Trend Papers Cites
Fule Li China 12 462 345 77 24 16 111 519
Mingyan Yu China 10 274 0.6× 179 0.5× 88 1.1× 61 2.5× 8 0.5× 64 398
Thomas Byunghak Cho South Korea 17 806 1.7× 163 0.5× 21 0.3× 18 0.8× 7 0.4× 35 825
Kyusun Choi United States 12 342 0.7× 359 1.0× 26 0.3× 11 0.5× 6 0.4× 30 451
S. Parke United States 13 882 1.9× 282 0.8× 36 0.5× 48 2.0× 12 0.8× 48 935
Danielle Griffith United States 12 422 0.9× 324 0.9× 40 0.5× 11 0.5× 4 0.3× 27 455
Robert van Veldhoven Netherlands 12 465 1.0× 442 1.3× 43 0.6× 8 0.3× 7 0.4× 26 505
P. Holloway United States 7 514 1.1× 473 1.4× 50 0.6× 17 0.7× 5 0.3× 14 534
David J. Comer United States 12 406 0.9× 322 0.9× 34 0.4× 10 0.4× 11 0.7× 47 489
Yu Pu United States 13 382 0.8× 158 0.5× 54 0.7× 81 3.4× 4 0.3× 35 492
R.J. Widlar United States 9 551 1.2× 417 1.2× 124 1.6× 24 1.0× 9 0.6× 20 597

Countries citing papers authored by Fule Li

Since Specialization
Citations

This map shows the geographic impact of Fule Li's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Fule Li with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Fule Li more than expected).

Fields of papers citing papers by Fule Li

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Fule Li. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Fule Li. The network helps show where Fule Li may publish in the future.

Co-authorship network of co-authors of Fule Li

This figure shows the co-authorship network connecting the top 25 collaborators of Fule Li. A scholar is included among the top collaborators of Fule Li based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Fule Li. Fule Li is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
1.
Wang, Peng, Fule Li, & Zhihua Wang. (2025). A Single-Channel 8-bit 1.6-GS/s Alternate-Comparator SAR ADC With Dither-Based Background Offset Calibration in 28-nm CMOS. IEEE Transactions on Circuits and Systems I Regular Papers. 72(9). 4527–4538.
2.
Li, Qiuying, Zhimeng Hu, Wenbo Liu, et al.. (2025). Characterization of a 4H–SiC neutron detector in the neutron field of an accelerator-based BNCT facility. Nuclear Instruments and Methods in Physics Research Section A Accelerators Spectrometers Detectors and Associated Equipment. 1080. 170698–170698. 1 indexed citations
4.
Wang, Yaning, Zhenguo Li, Fule Li, et al.. (2024). A Floating-Ring Hybrid Amplifier Insensitive to PVT and Common-mode Variation without CMFB for High-Speed ADCs. 1–5. 1 indexed citations
5.
Liu, Wei, et al.. (2024). WASA: a low power and high integration readout ASIC for TPCs in 65 nm CMOS. Journal of Instrumentation. 19(4). P04036–P04036.
6.
Wang, Xiao, et al.. (2021). A 13-bit 312.5-MS/s Pipelined SAR ADC With Open-Loop Integrator-Based Residue Amplifier and Gain-Stabilized Integration Time Generation. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 29(7). 1416–1427. 3 indexed citations
7.
Wang, Xiao, et al.. (2021). A 13-Bit 2-GS/s Time-Interleaved ADC With Improved Correlation-Based Timing Skew Calibration Strategy. IEEE Transactions on Circuits and Systems I Regular Papers. 69(2). 481–494. 24 indexed citations
8.
Yang, Peilin, Fule Li, & Zhihua Wang. (2021). A 12-Bit 2-GS/s Pipelined ADC Front-End Stage with Aperture Error Tuning and Split MDAC. 1–5. 2 indexed citations
9.
Yang, Peilin, Xiao Wang, Chengwei Wang, et al.. (2020). A 14-bit 200-Ms/s SHA-Less Pipelined ADC With Aperture Error Reduction. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 28(9). 2004–2013. 14 indexed citations
10.
Wang, Xiao, Fule Li, & Zhihua Wang. (2020). A Simple Histogram-Based Capacitor Mismatch Calibration in SAR ADCs. IEEE Transactions on Circuits & Systems II Express Briefs. 67(12). 2838–2842. 14 indexed citations
11.
Wang, Xiao, Fule Li, Jia Wen, & Zhihua Wang. (2018). A 14-Bit 500-MS/s Time-Interleaved ADC With Autocorrelation-Based Time Skew Calibration. IEEE Transactions on Circuits & Systems II Express Briefs. 66(3). 322–326. 18 indexed citations
12.
Zheng, Xuqiang, Chun Zhang, Feng Zhao, et al.. (2017). A 4–40 Gb/s PAM4 transmitter with output linearity optimization in 65 nm CMOS. 1–4. 11 indexed citations
14.
Zheng, Xuqiang, Chun Zhang, Feng Zhao, et al.. (2017). A 40-Gb/s Quarter-Rate SerDes Transmitter and Receiver Chipset in 65-nm CMOS. IEEE Journal of Solid-State Circuits. 52(11). 2963–2978. 38 indexed citations
15.
Zheng, Xuqiang, Chun Zhang, Feng Zhao, et al.. (2016). A 5-50 Gb/s quarter rate transmitter with a 4-tap multiple-MUX based FFE in 65 nm CMOS. Lincoln Repository (University of Lincoln). 305–308. 9 indexed citations
16.
Zheng, Xuqiang, Zhijun Wang, Fule Li, et al.. (2016). A 14-bit 250 MS/s IF Sampling Pipelined ADC in 180 nm CMOS Process. IEEE Transactions on Circuits and Systems I Regular Papers. 63(9). 1381–1392. 41 indexed citations
17.
Zheng, Xuqiang, Chun Zhang, Shuai Yuan, et al.. (2016). An improved 40 Gb/s CDR with jitter-suppression filters and phase-compensating interpolators. 85–88. 4 indexed citations
18.
Li, Weitao, Fule Li, Dandan Guo, Chun Zhang, & Zhihua Wang. (2010). An undersampling 14-bit cyclic ADC with over 100-dB SFDR. Journal of Semiconductors. 31(2). 25008–25008. 1 indexed citations
19.
Jiang, Hanjun, et al.. (2010). An energy-efficient SoC for closed-loop medical monitoring and intervention. 1–4. 2 indexed citations
20.
Li, Fule, et al.. (2008). A High Linearity,13bit Pipelined CMOS ADC. Journal of Semiconductors. 29(3). 497–501. 1 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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