Gin Yee

530 total citations
14 papers, 297 citations indexed

About

Gin Yee is a scholar working on Electrical and Electronic Engineering, Hardware and Architecture and Computational Theory and Mathematics. According to data from OpenAlex, Gin Yee has authored 14 papers receiving a total of 297 indexed citations (citations by other indexed papers that have themselves been cited), including 14 papers in Electrical and Electronic Engineering, 7 papers in Hardware and Architecture and 3 papers in Computational Theory and Mathematics. Recurrent topics in Gin Yee's work include Low-power high-performance VLSI design (14 papers), VLSI and Analog Circuit Testing (6 papers) and VLSI and FPGA Design Techniques (5 papers). Gin Yee is often cited by papers focused on Low-power high-performance VLSI design (14 papers), VLSI and Analog Circuit Testing (6 papers) and VLSI and FPGA Design Techniques (5 papers). Gin Yee collaborates with scholars based in United States. Gin Yee's co-authors include Carl Sechen, Cong Nam Truong, F. Klass, K. Aingaran, Anup Das, R. Heald and L. McMurchie and has published in prestigious journals such as IEEE Journal of Solid-State Circuits and IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

In The Last Decade

Gin Yee

14 papers receiving 271 citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name h Career Trend Papers Cites
Gin Yee United States 9 281 119 72 59 27 14 297
B.R. Zeydel United States 9 270 1.0× 93 0.8× 89 1.2× 66 1.1× 23 0.9× 13 290
C. Dietz United States 6 250 0.9× 139 1.2× 71 1.0× 26 0.4× 42 1.6× 7 290
Radu Zlatanovici United States 8 348 1.2× 90 0.8× 45 0.6× 57 1.0× 16 0.6× 14 369
Sung‐Chuan Fang Taiwan 4 280 1.0× 65 0.5× 128 1.8× 76 1.3× 25 0.9× 6 304
M. Elmasry Canada 9 502 1.8× 142 1.2× 146 2.0× 32 0.5× 31 1.1× 28 524
Hùng Ngô United States 9 327 1.2× 151 1.3× 85 1.2× 26 0.4× 39 1.4× 21 357
Runqi Gu United States 6 289 1.0× 88 0.7× 66 0.9× 17 0.3× 12 0.4× 12 300
L. Sigal United States 10 206 0.7× 112 0.9× 34 0.5× 40 0.7× 16 0.6× 20 231
M.R.C.M. Berkelaar Netherlands 10 447 1.6× 277 2.3× 40 0.6× 40 0.7× 25 0.9× 30 477
S. Bobba United States 10 373 1.3× 150 1.3× 46 0.6× 11 0.2× 23 0.9× 19 389

Countries citing papers authored by Gin Yee

Since Specialization
Citations

This map shows the geographic impact of Gin Yee's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Gin Yee with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Gin Yee more than expected).

Fields of papers citing papers by Gin Yee

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Gin Yee. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Gin Yee. The network helps show where Gin Yee may publish in the future.

Co-authorship network of co-authors of Gin Yee

This figure shows the co-authorship network connecting the top 25 collaborators of Gin Yee. A scholar is included among the top collaborators of Gin Yee based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Gin Yee. Gin Yee is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

14 of 14 papers shown
1.
Yee, Gin, et al.. (2003). Design and synthesis of monotonic circuits. 569–572. 13 indexed citations
2.
Yee, Gin, et al.. (2003). Design and synthesis of dynamic circuits. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 11(1). 141–149. 25 indexed citations
3.
Yee, Gin, et al.. (2002). An automated shielding algorithm and tool for dynamic circuits. 369–374. 6 indexed citations
4.
Yee, Gin & Carl Sechen. (2002). Clock-delayed domino for adder and combinational logic design. 332–337. 33 indexed citations
5.
McMurchie, L., et al.. (2002). Output prediction logic: a high-performance CMOS design technique. 247–254. 25 indexed citations
6.
Yee, Gin, et al.. (2002). Locally clocked pipelines and dynamic logic. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 10(1). 58–62. 8 indexed citations
7.
Yee, Gin, et al.. (2002). Domino logic synthesis using complex static gates. 1 indexed citations
8.
Yee, Gin & Carl Sechen. (2002). Dynamic logic synthesis. 345–348. 16 indexed citations
9.
Yee, Gin, et al.. (2002). Locally-clocked dynamic logic. 18–21. 5 indexed citations
10.
Yee, Gin & Carl Sechen. (2000). Clock-delayed domino for dynamic circuit design. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 8(4). 425–430. 28 indexed citations
11.
12.
Klass, F., Anup Das, K. Aingaran, et al.. (1999). A new family of semidynamic and dynamic flip-flops with embedded logic for high-performance processors. IEEE Journal of Solid-State Circuits. 34(5). 712–716. 107 indexed citations
13.
Yee, Gin, et al.. (1999). Monotonic static CMOS and dual-VT technology. 151–155. 11 indexed citations
14.
Yee, Gin, et al.. (1998). Domino logic synthesis using complex static gates. 242–247. 18 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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2026