R. Heald

584 total citations
15 papers, 350 citations indexed

About

R. Heald is a scholar working on Electrical and Electronic Engineering, Hardware and Architecture and Computer Networks and Communications. According to data from OpenAlex, R. Heald has authored 15 papers receiving a total of 350 indexed citations (citations by other indexed papers that have themselves been cited), including 14 papers in Electrical and Electronic Engineering, 7 papers in Hardware and Architecture and 5 papers in Computer Networks and Communications. Recurrent topics in R. Heald's work include Low-power high-performance VLSI design (8 papers), Advancements in Semiconductor Devices and Circuit Design (5 papers) and VLSI and Analog Circuit Testing (4 papers). R. Heald is often cited by papers focused on Low-power high-performance VLSI design (8 papers), Advancements in Semiconductor Devices and Circuit Design (5 papers) and VLSI and Analog Circuit Testing (4 papers). R. Heald collaborates with scholars based in United States. R. Heald's co-authors include Cong Nam Truong, K. Aingaran, Gin Yee, F. Klass, Anup Das, Ali Hajimiri, Eliete Bouskela, Curt A. Wiederhielm, D.A. Hodges and G. Lauterbach and has published in prestigious journals such as IEEE Journal of Solid-State Circuits and Microvascular Research.

In The Last Decade

R. Heald

15 papers receiving 314 citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name h Career Trend Papers Cites
R. Heald United States 9 297 127 58 49 32 15 350
H. Mair United States 5 256 0.9× 87 0.7× 93 1.6× 37 0.8× 18 0.6× 7 280
W.K. Luk United States 9 293 1.0× 155 1.2× 11 0.2× 81 1.7× 17 0.5× 22 327
Gin Yee United States 9 281 0.9× 119 0.9× 72 1.2× 27 0.6× 59 1.8× 14 297
Bogdan Tutuianu United States 5 447 1.5× 221 1.7× 32 0.6× 29 0.6× 14 0.4× 6 461
T. Gabara United States 10 304 1.0× 50 0.4× 105 1.8× 68 1.4× 12 0.4× 39 323
B.R. Zeydel United States 9 270 0.9× 93 0.7× 89 1.5× 23 0.5× 66 2.1× 13 290
S. Bobba United States 10 373 1.3× 150 1.2× 46 0.8× 23 0.5× 11 0.3× 19 389
Elio Consoli Italy 12 464 1.6× 103 0.8× 104 1.8× 17 0.3× 47 1.5× 24 473
Y. Ye United States 6 546 1.8× 205 1.6× 65 1.1× 50 1.0× 19 0.6× 8 562
L. Sigal United States 10 206 0.7× 112 0.9× 34 0.6× 16 0.3× 40 1.3× 20 231

Countries citing papers authored by R. Heald

Since Specialization
Citations

This map shows the geographic impact of R. Heald's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by R. Heald with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites R. Heald more than expected).

Fields of papers citing papers by R. Heald

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by R. Heald. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by R. Heald. The network helps show where R. Heald may publish in the future.

Co-authorship network of co-authors of R. Heald

This figure shows the co-authorship network connecting the top 25 collaborators of R. Heald. A scholar is included among the top collaborators of R. Heald based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with R. Heald. R. Heald is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

15 of 15 papers shown
1.
Dixit, Anand Mohan & R. Heald. (2009). Soft error estimates for fabless companies. 125–127. 2 indexed citations
2.
Wang, Ping, et al.. (2005). A 4-MB on-chip L2 cache for a 90-nm 1.6-GHz 64-bit microprocessor. IEEE Journal of Solid-State Circuits. 40(1). 52–59. 8 indexed citations
3.
Heald, R., et al.. (2005). Variability in sub-100nm SRAM designs. 347–352. 118 indexed citations
4.
Heald, R., et al.. (2004). A 4MB on-chip L2 cache for a 90nm 1.6GHz 64b SPARC microprocessor. 11 indexed citations
5.
Heald, R., et al.. (2002). A CMOS circuit for real-time chip temperature measurement. 286–291. 11 indexed citations
6.
Hajimiri, Ali & R. Heald. (2002). Design issues in cross-coupled inverter sense amplifier. 2. 149–152. 20 indexed citations
7.
Klass, F., Anup Das, K. Aingaran, et al.. (1999). A new family of semidynamic and dynamic flip-flops with embedded logic for high-performance processors. IEEE Journal of Solid-State Circuits. 34(5). 712–716. 107 indexed citations
8.
Heald, R., et al.. (1998). 64-KByte sum-addressed-memory cache with 1.6-ns cycle and 2.6-ns latency. IEEE Journal of Solid-State Circuits. 33(11). 1682–1689. 19 indexed citations
9.
Heald, R., et al.. (1993). A 6-ns cycle 256-kb cache memory and memory management unit. IEEE Journal of Solid-State Circuits. 28(11). 1078–1083. 15 indexed citations
10.
Heald, R., et al.. (1985). A 15ns 64K bipolar SRAM. 50–51. 4 indexed citations
12.
Wiederhielm, Curt A., et al.. (1979). A method for varying arterial and venous pressures in intact, unanesthetized mammals. Microvascular Research. 18(1). 124–128. 23 indexed citations
13.
Heald, R.. (1978). A four-device bipolar memory cell. 102–103. 2 indexed citations
14.
Heald, R. & D.A. Hodges. (1976). Multilevel random-access memory using one transistor per cell. IEEE Journal of Solid-State Circuits. 11(4). 519–528. 3 indexed citations
15.
Heald, R. & D.A. Hodges. (1973). Design of Schottky-barrier diode clamped transistor layouts. IEEE Journal of Solid-State Circuits. 8(4). 269–275. 3 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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