T. Kisu

699 total citations
19 papers, 503 citations indexed

About

T. Kisu is a scholar working on Electrical and Electronic Engineering, Atomic and Molecular Physics, and Optics and Materials Chemistry. According to data from OpenAlex, T. Kisu has authored 19 papers receiving a total of 503 indexed citations (citations by other indexed papers that have themselves been cited), including 17 papers in Electrical and Electronic Engineering, 4 papers in Atomic and Molecular Physics, and Optics and 3 papers in Materials Chemistry. Recurrent topics in T. Kisu's work include Semiconductor materials and devices (16 papers), Advancements in Semiconductor Devices and Circuit Design (10 papers) and Low-power high-performance VLSI design (7 papers). T. Kisu is often cited by papers focused on Semiconductor materials and devices (16 papers), Advancements in Semiconductor Devices and Circuit Design (10 papers) and Low-power high-performance VLSI design (7 papers). T. Kisu collaborates with scholars based in Japan, United Kingdom and United States. T. Kisu's co-authors include Y. Kawamoto, H. Shinriki, Takashi Nishida, S. Kimura, Y. Nakagome, K. Itoh, K. Mukai, Yasushiro Nishioka, Fabrício Murai and Digh Hisamoto and has published in prestigious journals such as Physical Review Letters, IEEE Journal of Solid-State Circuits and IEEE Transactions on Electron Devices.

In The Last Decade

T. Kisu

18 papers receiving 480 citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name	h						Papers	Cites
T. Kisu Japan	10	403	115	82	82	66	19	503
T. Werner Germany	12	273 0.7×	80 0.7×	104 1.3×	143 1.7×	57 0.9×	44	463
N. Yokoyama Japan	13	404 1.0×	77 0.7×	64 0.8×	45 0.5×	74 1.1×	32	470
H. Jaouen France	11	550 1.4×	123 1.1×	27 0.3×	40 0.5×	118 1.8×	80	642
E. Kume Japan	11	282 0.7×	124 1.1×	121 1.5×	215 2.6×	200 3.0×	28	546
Mitsuo Okamoto Japan	20	1.0k 2.6×	72 0.6×	108 1.3×	133 1.6×	131 2.0×	114	1.2k
Taichiro Fukui Japan	10	287 0.7×	78 0.7×	105 1.3×	123 1.5×	125 1.9×	42	507
H. Kano Japan	13	304 0.8×	33 0.3×	40 0.5×	86 1.0×	43 0.7×	27	419
Norio Ohta Japan	10	188 0.5×	58 0.5×	42 0.5×	98 1.2×	133 2.0×	48	375
Young‐Se Kwon South Korea	13	575 1.4×	136 1.2×	111 1.4×	41 0.5×	61 0.9×	66	635
Takuya Hoshi Japan	11	325 0.8×	87 0.8×	142 1.7×	63 0.8×	62 0.9×	57	418

Countries citing papers authored by T. Kisu

Since Specialization

Citations

This map shows the geographic impact of T. Kisu's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by T. Kisu with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites T. Kisu more than expected).

Fields of papers citing papers by T. Kisu

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by T. Kisu. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by T. Kisu. The network helps show where T. Kisu may publish in the future.

Co-authorship network of co-authors of T. Kisu

This figure shows the co-authorship network connecting the top 25 collaborators of T. Kisu. A scholar is included among the top collaborators of T. Kisu based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with T. Kisu. T. Kisu is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

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19 of 19 papers shown

Shoji, K., Hiroyuki Yamashita, T. Kisu, et al.. (2002). A scalable single-transistor/single-capacitor memory cell structure characterized by an angled-capacitor layout for megabit FeRAMs. 126–127. 1 indexed citations

Nakazato, Kazuhiko, H. Ahmed, Hiroshi Mizuta, et al.. (2002). Phase-state low electron-number drive random access memory (PLEDM). 132–133. 13 indexed citations

Shoji, K., Masahiro Moniwa, Hiroyuki Yamashita, et al.. (2002). A 7.03-μm/sup 2/ Vcc/2-plate nonvolatile DRAM cell with a Pt/PZT/Pt/TiN capacitor patterned by one-mask dry etching. 28–29. 3 indexed citations

Miki, H., Hidekazu Goto, Yuzuru Ohji, et al.. (1999). Leakage-current mechanism of a tantalum-pentoxide capacitor on rugged Si with a CVD-TiN plate electrode for high-density DRAMs. 99–100. 5 indexed citations

Kisu, T. & Kazuhiko Nakazato. (1999). Silicon Stacked Transistor with Source and Drain Tunnel Barriers. 1. 532–535. 2 indexed citations

Shibauchi, T., Tadashi Nakano, Mitsuru Sato, et al.. (1999). Interlayer Phase Coherence in the Vortex Matter Phases ofBi2Sr2CaCu2O8+y. Physical Review Letters. 83(5). 1010–1013. 79 indexed citations

Yokoya, T., T. Kisu, & Shik Shin. (1999). Sample Cooling in Photoemission Spectroscopy.. Hyomen Kagaku. 20(12). 890–891.

Kitsukawa, G., Masashi Horiguchi, T. Kawahara, et al.. (1993). 256 Mb DRAM technologies for file applications. 48–49. 22 indexed citations

Kitsukawa, G., Masashi Horiguchi, Y. Kawajiri, et al.. (1993). 256-Mb DRAM circuit technologies for file applications. IEEE Journal of Solid-State Circuits. 28(11). 1105–1113. 24 indexed citations

10.

Nakagome, Y., K. Itoh, Kazuhiro Takeuchi, et al.. (1991). Circuit techniques for 1.5-3.6-V battery-operated 64-Mb DRAM. IEEE Journal of Solid-State Circuits. 26(7). 1003–1010. 14 indexed citations

11.

Nakagome, Y., Hiroki Tanaka, Kazuhiro Takeuchi, et al.. (1991). An experimental 1.5-V 64-Mb DRAM. IEEE Journal of Solid-State Circuits. 26(4). 465–472. 138 indexed citations

12.

Kaga, T., T. Kure, H. Shinriki, et al.. (1991). Crown-shaped stacked-capacitor cell for 1.5-V operation 64-Mb DRAMs. IEEE Transactions on Electron Devices. 38(2). 255–261. 28 indexed citations

13.

Nakagome, Y., K. Itoh, Kazuhiro Takeuchi, et al.. (1990). Circuit Techniques for 1.5-3.6V Battery-Operated 64Mb DRAMs. European Solid-State Circuits Conference. 1. 157–160. 3 indexed citations

14.

Kimura, S., Y. Kawamoto, T. Kure, et al.. (1990). A diagonal active-area stacked capacitor DRAM cell with storage capacitor on bit line. IEEE Transactions on Electron Devices. 37(3). 737–743. 9 indexed citations

15.

Nakagome, Y., Y. Kawamoto, Hiroki Tanaka, et al.. (1990). A 1.5 V circuit technology for 64 Mb DRAMs. 17–18. 41 indexed citations

16.

Kawamoto, Y., T. Kaga, Takashi Nishida, et al.. (1990). A 1.28 &mu;m² bit-line shielded memory cell technology for 64 Mb DRAMs. 13–14. 9 indexed citations

17.

Shinriki, H., T. Kisu, S. Kimura, et al.. (1990). Promising storage capacitor structures with thin Ta/sub 2/O/sub 5/ film for low-power high-density DRAMs. IEEE Transactions on Electron Devices. 37(9). 1939–1947. 103 indexed citations

18.

Kimura, S., Y. Kawamoto, Norio Hasegawa, et al.. (1988). An optically delineated 4.2- mu m/sup 2/ self-aligned isolated-plate stacked-capacitor DRAM cell. IEEE Transactions on Electron Devices. 35(10). 1591–1595. 7 indexed citations

19.

Kisu, T., Shota Kimura, T. Kure, et al.. (1988). A Novel Storage Capacitance Enlargement Structure Using a Double-Stacked Storage Node in STC DRAM Cell. 2 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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