Florentin Dartu

971 citations

20 papers · 723 indexed · h-index 11

Co-authors: Lawrence T. Pileggi Noel Menezes N. Menezes L.T. Pillage Bogdan Tutuianu David Blaauw Aseem Agarwal Ravishankar Arunachalam
Topics: Low-power high-performance VLSI design (19 papers)VLSI and FPGA Design Techniques (14 papers)VLSI and Analog Circuit Testing (12 papers)
Cited by: Hardware and Architecture Electrical and Electronic Engineering Biomedical Engineering
Journals: IEEE Transactions on Computer-Aided Design of Integrated Circuits and SystemsDigest of technical papers/Digest of technical papers - IEEE/ACM International Conference on Computer-Aided DesignInternational Conference on Computer Aided Design
Partner nations: United States Switzerland United Kingdom

In The Last Decade

Florentin Dartu

18 papers receiving 687 citations

Peers

Countries citing papers authored by Florentin Dartu

Since Specialization

Citations

This map shows the geographic impact of Florentin Dartu's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Florentin Dartu with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Florentin Dartu more than expected).

Fields of papers citing papers by Florentin Dartu

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Florentin Dartu. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Florentin Dartu. The network helps show where Florentin Dartu may publish in the future.

Co-authorship network of co-authors of Florentin Dartu

This figure shows the co-authorship network connecting the top 25 collaborators of Florentin Dartu. A scholar is included among the top collaborators of Florentin Dartu based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Florentin Dartu. Florentin Dartu is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

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20 of 20 papers shown

#	Work	Indexed citations
1	To do or not to do hierarchical timing? 2013 ·Florentin Dartu,(unknown)	2
2	Timed Input Pattern Generation for an Accurate Delay Calculation Under Multiple Input Switching 2010 ·IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ·Seung Hoon Choi,Kunhyuk Kang,Florentin Dartu,Kaushik Roy	3
3	Algorithms for MIS vector generation and pruning 2006 ·Digest of technical papers/Digest of technical papers - IEEE/ACM International Conference on Computer-Aided Design ·Kenneth S. Stevens,Florentin Dartu	0
4	Algorithms for MIS Vector Generation and Pruning 2006 ·Digest of technical papers/Digest of technical papers - IEEE/ACM International Conference on Computer-Aided Design ·Kenneth S. Stevens,Florentin Dartu	0
5	Calculating worst-case gate delays due to dominant capacitance coupling 2005 ·Florentin Dartu,Lawrence T. Pileggi	15
6	Statistical static timing analysis 2005 ·Chirayu Amin,Noel Menezes,(unknown),Florentin Dartu,Umakanta Choudhury,Nagib Hakim,Yehea Ismail	69
7	Weibull-based analytical waveform model 2005 ·IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ·Chirayu Amin,Florentin Dartu,Yehea Ismail	6
8	Statistical gate delay model considering multiple input switching 2004 ·Aseem Agarwal,Florentin Dartu,David Blaauw	61
9	Timed pattern generation for noise-on-delay calculation 2002 ·Proceedings - ACM IEEE Design Automation Conference ·Seung Hoon Choi,Kaushik Roy,Florentin Dartu	5
10	Timed pattern generation for noise-on-delay calculation 2002 ·Seung Hoon Choi,Florentin Dartu,Kaushik Roy	3
11	Timed pattern generation for noise-on-delay calculation 2002 ·Proceedings - ACM IEEE Design Automation Conference ·Seung Hoon Choi,Kaushik Roy,Florentin Dartu	1
12	TETA: transistor-level waveform evaluation for timing analysis 2002 ·IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ·Erdem Acar,Florentin Dartu,Lawrence T. Pileggi	30
13	TETA 1998 ·Florentin Dartu,Lawrence T. Pileggi	16
14	CMOS gate delay models for general RLC loading 1997 ·Ravishankar Arunachalam,Florentin Dartu,Lawrence T. Pileggi	55
15	Calculating worst-case gate delays due to dominant capacitance coupling 1997 ·Florentin Dartu,Lawrence T. Pileggi	118
16	An explicit RC-circuit delay approximation based on the first three moments of the impulse response 1996 ·Bogdan Tutuianu,Florentin Dartu,Lawrence T. Pileggi	73
17	RC-interconnect macromodels for timing simulation 1996 ·Florentin Dartu,Bogdan Tutuianu,Lawrence T. Pileggi	3
18	Performance computation for precharacterized CMOS gates with RC loads 1996 ·IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ·Florentin Dartu,N. Menezes,Lawrence T. Pileggi	128
19	RC interconnect synthesis—a moment fitting approach 1994 ·International Conference on Computer Aided Design ·Noel Menezes,S. Pullela,Florentin Dartu,L.T. Pillage	42
20	A gate-delay model for high-speed CMOS circuits 1994 ·Florentin Dartu,Noel Menezes,(unknown),L.T. Pillage	93

About Florentin Dartu

Florentin Dartu is a scholar working on Hardware and Architecture, Electrical and Electronic Engineering and Industrial and Manufacturing Engineering, having authored 20 papers that have together received 723 indexed citations. Recurring topics across this work include Low-power high-performance VLSI design (19 papers), VLSI and FPGA Design Techniques (14 papers) and VLSI and Analog Circuit Testing (12 papers). The work is most often cited by research in Hardware and Architecture (469 citations), Electrical and Electronic Engineering (709 citations) and Biomedical Engineering (92 citations). Florentin Dartu has collaborated with scholars based in United States, Switzerland and United Kingdom. Frequent co-authors include Lawrence T. Pileggi, Noel Menezes, N. Menezes, L.T. Pillage, Bogdan Tutuianu, David Blaauw, Aseem Agarwal, Ravishankar Arunachalam, Chirayu Amin and Yehea Ismail. Their work appears in journals such as IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Digest of technical papers/Digest of technical papers - IEEE/ACM International Conference on Computer-Aided Design and International Conference on Computer Aided Design.

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