L.T. Pillage

3.9k total citations · 1 hit paper
40 papers, 2.9k citations indexed

About

L.T. Pillage is a scholar working on Electrical and Electronic Engineering, Hardware and Architecture and Atomic and Molecular Physics, and Optics. According to data from OpenAlex, L.T. Pillage has authored 40 papers receiving a total of 2.9k indexed citations (citations by other indexed papers that have themselves been cited), including 35 papers in Electrical and Electronic Engineering, 18 papers in Hardware and Architecture and 2 papers in Atomic and Molecular Physics, and Optics. Recurrent topics in L.T. Pillage's work include Low-power high-performance VLSI design (34 papers), VLSI and FPGA Design Techniques (19 papers) and VLSI and Analog Circuit Testing (15 papers). L.T. Pillage is often cited by papers focused on Low-power high-performance VLSI design (34 papers), VLSI and FPGA Design Techniques (19 papers) and VLSI and Analog Circuit Testing (15 papers). L.T. Pillage collaborates with scholars based in United States and Hungary. L.T. Pillage's co-authors include R.A. Rohrer, S. Pullela, Ronald A. Rohrer, Nanda Gopal, C. Visweswariah, Noel Menezes, Florentin Dartu, N. Menezes, Xiaojing Huang and Rohini Gupta and has published in prestigious journals such as IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on Education and IEEE Circuits and Devices Magazine.

In The Last Decade

L.T. Pillage

39 papers receiving 2.7k citations

Hit Papers

Asymptotic waveform evaluation for timing analysis 1990 2026 2002 2014 1990 400 800 1.2k
What are hit papers?

Hit papers significantly outperform the citation benchmark for their cohort. A paper qualifies if it has ≥500 total citations, achieves ≥1.5× the top-1% citation threshold for papers in the same subfield and year (this is the minimum needed to enter the top 1%, not the average within it), or reaches the top citation threshold in at least one of its specific research topics.

  1. Asymptotic waveform evaluation for timing analysis
    1990 1.4k citations L.T. Pillage, R.A. Rohrer IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems profile →

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name h Career Trend Papers Cites
L.T. Pillage United States 17 2.7k 1.1k 523 259 134 40 2.9k
K. Kundert United States 20 1.8k 0.6× 225 0.2× 239 0.5× 393 1.5× 51 0.4× 39 2.1k
P. Feldmann United States 21 1.6k 0.6× 319 0.3× 987 1.9× 182 0.7× 327 2.4× 56 2.2k
Eli Chiprout United States 18 1.3k 0.5× 276 0.3× 300 0.6× 80 0.3× 59 0.4× 50 1.4k
Altan Odabasioglu United States 7 1.2k 0.4× 190 0.2× 738 1.4× 78 0.3× 193 1.4× 7 1.4k
Kishore Singhal United States 10 867 0.3× 189 0.2× 106 0.2× 131 0.5× 58 0.4× 16 1.1k
Ramachandra Achar Canada 28 2.6k 0.9× 87 0.1× 349 0.7× 103 0.4× 228 1.7× 183 2.9k
R.W. Freund United States 14 1.2k 0.4× 155 0.1× 1.1k 2.0× 98 0.4× 299 2.2× 18 1.7k
P.A. Brennan United States 7 1.5k 0.5× 143 0.1× 133 0.3× 86 0.3× 48 0.4× 8 1.7k
Chung-Wen Ho United States 6 1.1k 0.4× 141 0.1× 121 0.2× 92 0.4× 45 0.3× 10 1.3k
Charlie Chung‐Ping Chen Taiwan 17 1.1k 0.4× 454 0.4× 53 0.1× 96 0.4× 20 0.1× 78 1.2k

Countries citing papers authored by L.T. Pillage

Since Specialization
Citations

This map shows the geographic impact of L.T. Pillage's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by L.T. Pillage with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites L.T. Pillage more than expected).

Fields of papers citing papers by L.T. Pillage

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by L.T. Pillage. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by L.T. Pillage. The network helps show where L.T. Pillage may publish in the future.

Co-authorship network of co-authors of L.T. Pillage

This figure shows the co-authorship network connecting the top 25 collaborators of L.T. Pillage. A scholar is included among the top collaborators of L.T. Pillage based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with L.T. Pillage. L.T. Pillage is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
1.
2.
Pillage, L.T., et al.. (2002). Calculation and application of time-domain waveform sensitivities in asymptotic waveform evaluation. 8.4/1–8.4/4. 2 indexed citations
3.
Pillage, L.T., Xiaojing Huang, & R.A. Rohrer. (2002). Asymptotic waveform evaluation for circuits containing floating nodes. 613–616. 3 indexed citations
4.
Pullela, S., N. Menezes, & L.T. Pillage. (2002). Low power IC clock tree design. 263–266. 12 indexed citations
5.
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7.
Pillage, L.T.. (1998). Electronic Circuit & System Simulation Methods (SRE). McGraw-Hill, Inc. eBooks. 67 indexed citations
8.
Pillage, L.T., R.A. Rohrer, & C. Visweswariah. (1998). Electronic Circuit and System Simulation Methods [Book Reviews]. IEEE Circuits and Devices Magazine. 14(6). 45–45. 16 indexed citations
9.
Menezes, Noel, S. Pullela, Florentin Dartu, & L.T. Pillage. (1994). RC interconnect synthesis—a moment fitting approach. International Conference on Computer Aided Design. 418–425. 42 indexed citations
10.
Dartu, Florentin, et al.. (1994). A gate-delay model for high-speed CMOS circuits. 576–580. 93 indexed citations
11.
Gopal, Nanda, et al.. (1994). Enhancing the stability of asymptotic waveform evaluation for digital interconnect circuit applications. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 13(6). 729–736. 20 indexed citations
12.
Pillage, L.T., et al.. (1994). RICE: rapid interconnect circuit evaluation using AWE. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 13(6). 763–776. 194 indexed citations
13.
Tuncer, E., et al.. (1993). An efficient methodology for extraction and simulation of transmission lines for application specific electronic modules. International Conference on Computer Aided Design. 58–65. 10 indexed citations
14.
Pullela, S., Noel Menezes, & L.T. Pillage. (1993). Reliable non-zero skew clock trees using wire width optimization. 165–170. 80 indexed citations
15.
Mercer, M.R., et al.. (1992). ETA: electrical-level timing analysis. International Conference on Computer Aided Design. 258–262. 2 indexed citations
16.
Gopal, Nanda, et al.. (1992). AWE macromodels of VLSI interconnect for circuit simulation. International Conference on Computer Aided Design. 64–70. 1 indexed citations
17.
Gopal, Nanda, et al.. (1991). RICE. 555–560. 145 indexed citations
18.
Pillage, L.T. & R.A. Rohrer. (1990). Asymptotic waveform evaluation for timing analysis. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 9(4). 352–366. 1420 indexed citations breakdown →
19.
Pillage, L.T., Xiaojing Huang, & R.A. Rohrer. (1989). AWEsim: asymptotic waveform evaluation for timing analysis. 634–637. 38 indexed citations
20.
Pillage, L.T. & Ronald A. Rohrer. (1988). A quadratic metric with a simple solution scheme for initial placement. Design Automation Conference. 324–329. 12 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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