F. Lima

479 total citations
7 papers, 283 citations indexed

About

F. Lima is a scholar working on Electrical and Electronic Engineering, Hardware and Architecture and Artificial Intelligence. According to data from OpenAlex, F. Lima has authored 7 papers receiving a total of 283 indexed citations (citations by other indexed papers that have themselves been cited), including 7 papers in Electrical and Electronic Engineering, 6 papers in Hardware and Architecture and 1 paper in Artificial Intelligence. Recurrent topics in F. Lima's work include Radiation Effects in Electronics (6 papers), Low-power high-performance VLSI design (6 papers) and VLSI and Analog Circuit Testing (4 papers). F. Lima is often cited by papers focused on Radiation Effects in Electronics (6 papers), Low-power high-performance VLSI design (6 papers) and VLSI and Analog Circuit Testing (4 papers). F. Lima collaborates with scholars based in Brazil, France and United States. F. Lima's co-authors include Ricardo Reis, Luigi Carro, C. Carmichael, J. Fabula, R. Padovani, Altamiro Susin, Renato Hentschke, S. Rezgui, Érika Cota and Raoul Velazco and has published in prestigious journals such as Journal of Electronic Testing.

In The Last Decade

F. Lima

7 papers receiving 264 citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name h Career Trend Papers Cites
F. Lima Brazil 6 266 229 51 16 14 7 283
Nathaniel Rollins United States 9 323 1.2× 300 1.3× 39 0.8× 25 1.6× 15 1.1× 15 358
Sobeeh Almukhaizim United States 12 319 1.2× 280 1.2× 34 0.7× 12 0.8× 11 0.8× 37 336
Renato Hentschke Brazil 10 291 1.1× 218 1.0× 62 1.2× 7 0.4× 9 0.6× 19 303
N. N. Mahatme United States 16 716 2.7× 374 1.6× 32 0.6× 31 1.9× 26 1.9× 40 728
Jim Krone United States 7 318 1.2× 248 1.1× 37 0.7× 19 1.2× 3 0.2× 8 335
Jean-Marc Daveau France 9 184 0.7× 97 0.4× 28 0.5× 9 0.6× 8 0.6× 26 218
Karl Cheng Taiwan 3 311 1.2× 253 1.1× 178 3.5× 7 0.4× 17 1.2× 7 328
Riaz Naseer United States 8 416 1.6× 283 1.2× 99 1.9× 11 0.7× 25 1.8× 9 444
G.S. Choi United States 11 420 1.6× 224 1.0× 173 3.4× 25 1.6× 30 2.1× 31 447
C. Lane United States 4 145 0.5× 129 0.6× 45 0.9× 7 0.4× 3 0.2× 10 176

Countries citing papers authored by F. Lima

Since Specialization
Citations

This map shows the geographic impact of F. Lima's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by F. Lima with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites F. Lima more than expected).

Fields of papers citing papers by F. Lima

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by F. Lima. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by F. Lima. The network helps show where F. Lima may publish in the future.

Co-authorship network of co-authors of F. Lima

This figure shows the co-authorship network connecting the top 25 collaborators of F. Lima. A scholar is included among the top collaborators of F. Lima based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with F. Lima. F. Lima is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

7 of 7 papers shown
1.
Lima, F., C. Carmichael, J. Fabula, R. Padovani, & Ricardo Reis. (2005). A fault injection analysis of Virtex FPGA TMR design methodology. 275–282. 85 indexed citations
2.
Lima, F., et al.. (2004). Designing fault tolerant systems into SRAM-based FPGAs. 650–655. 25 indexed citations
3.
4.
Lima, F., Luigi Carro, & Ricardo Reis. (2003). Reducing pin and area overhead in fault-tolerant FPGA-based designs. 108–117. 11 indexed citations
5.
Lima, F., et al.. (2003). A tool for analysis of universal logic gates functionality. 184–187. 1 indexed citations
6.
Lima, F., Luigi Carro, & Ricardo Reis. (2003). Designing fault tolerant systems into SRAM-based FPGAs. 650–655. 92 indexed citations
7.
Cota, Érika, F. Lima, S. Rezgui, et al.. (2001). Synthesis of an 8051-Like Micro-Controller Tolerant to Transient Faults. Journal of Electronic Testing. 17(2). 149–161. 8 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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2026