Dinesh Gaitonde
- Hardware and Architecture top 5%
- Electrical and Electronic Engineering
- Computer Networks and Communications top 10%
- Computer Vision and Pattern Recognition
- Artificial Intelligence
- Topics
- VLSI and Analog Circuit Testing (12 papers)VLSI and FPGA Design Techniques (9 papers)Integrated Circuits and Semiconductor Failure Analysis (7 papers)
- Journals
- IEEE Transactions on Semiconductor ManufacturingInternational Conference on Computer Aided Design
- Partner nations
- United States
In The Last Decade
Dinesh Gaitonde
19 papers receiving 250 citations
Peers
Comparison fields: 5 of 32
- Hardware and Architecture 189
- Electrical and Electronic Engineering 166
- Computer Networks and Communications 120
- Computer Vision and Pattern Recognition 29
- Artificial Intelligence 20
Countries citing papers authored by Dinesh Gaitonde
This map shows the geographic impact of Dinesh Gaitonde's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Dinesh Gaitonde with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Dinesh Gaitonde more than expected).
Fields of papers citing papers by Dinesh Gaitonde
This network shows the impact of papers produced by Dinesh Gaitonde. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Dinesh Gaitonde. The network helps show where Dinesh Gaitonde may publish in the future.
Co-authorship network of co-authors of Dinesh Gaitonde
This figure shows the co-authorship network connecting the top 25 collaborators of Dinesh Gaitonde. A scholar is included among the top collaborators of Dinesh Gaitonde based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Dinesh Gaitonde. Dinesh Gaitonde is excluded from the visualization to improve readability, since they are connected to all nodes in the network.
All Works
| # | Work | Indexed citations |
|---|---|---|
| 1 | 9 | |
| 2 | 0 | |
| 3 | 4 | |
| 4 | 20 | |
| 5 | 32 | |
| 6 | 15 | |
| 7 | 88 | |
| 8 | 3 | |
| 9 | 5 | |
| 10 | 10 | |
| 11 | 13 | |
| 12 | 18 | |
| 13 | 4 | |
| 14 | 1 | |
| 15 | 11 | |
| 16 | 3 | |
| 17 | 8 | |
| 18 | Fatal Fault Probability Prediction for Array Based Designs | 1 |
| 19 | 15 | |
| 20 | 4 |
About Dinesh Gaitonde
Dinesh Gaitonde is a scholar working on Hardware and Architecture, Computer Networks and Communications and Electrical and Electronic Engineering, having authored 20 papers that have together received 264 indexed citations. Recurring topics across this work include VLSI and Analog Circuit Testing (12 papers), VLSI and FPGA Design Techniques (9 papers) and Integrated Circuits and Semiconductor Failure Analysis (7 papers). The work is most often cited by research in Hardware and Architecture (189 citations), Computational Mathematics (4 citations) and Computer Networks and Communications (120 citations). Dinesh Gaitonde has collaborated with scholars based in United States. Frequent co-authors include Hossein Omidian, Abhishek Joshi, W. Maly, Lisa Liu, Alireza Kaviani, J. Khare and D.M.H. Walker. Their work appears in journals such as IEEE Transactions on Semiconductor Manufacturing and International Conference on Computer Aided Design.
Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.