Arun Joseph

523 total citations
25 papers, 343 citations indexed

About

Arun Joseph is a scholar working on Electrical and Electronic Engineering, Hardware and Architecture and Condensed Matter Physics. According to data from OpenAlex, Arun Joseph has authored 25 papers receiving a total of 343 indexed citations (citations by other indexed papers that have themselves been cited), including 18 papers in Electrical and Electronic Engineering, 12 papers in Hardware and Architecture and 4 papers in Condensed Matter Physics. Recurrent topics in Arun Joseph's work include VLSI and Analog Circuit Testing (7 papers), Embedded Systems Design Techniques (7 papers) and Low-power high-performance VLSI design (6 papers). Arun Joseph is often cited by papers focused on VLSI and Analog Circuit Testing (7 papers), Embedded Systems Design Techniques (7 papers) and Low-power high-performance VLSI design (6 papers). Arun Joseph collaborates with scholars based in Netherlands, India and United States. Arun Joseph's co-authors include Peter Pálenský, A. van der Meer, Kaikai Pan, Miloš Cvetković, Sai Manoj Pudukotai Dinakarrao, Shanthi Prince, Hans G. Kerkhoff, Houman Homayoun, Jörg Henkel and Muhammad Shafique and has published in prestigious journals such as SHILAP Revista de lepidopterología, Physica C Superconductivity and Superconductor Science and Technology.

In The Last Decade

Arun Joseph

23 papers receiving 321 citations

Peers

Arun Joseph

EEE

CSE

IME

CNC

MSOR

Karim Atif Algeria

Michele Lora Italy

Akshay Rajhans United States

Dilip Kotak Canada

Hans-Dieter Kochs Germany

Andrea Domenici Italy

Omar Hammami France

Logan Rakai Canada

Chien-Ying Chen United States

Renchang Dai United States

Karim Atif Algeria

Arun Joseph

110 ×0.6

EEE

132 ×0.8

CSE

81 ×1.5

IME

24 ×0.5

CNC

8 ×0.2

MSOR

Citations per year, relative to Arun Joseph Arun Joseph (= 1×) peers Karim Atif

Countries citing papers authored by Arun Joseph

Since Specialization

Citations

This map shows the geographic impact of Arun Joseph's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Arun Joseph with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Arun Joseph more than expected).

Fields of papers citing papers by Arun Joseph

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Arun Joseph. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Arun Joseph. The network helps show where Arun Joseph may publish in the future.

Co-authorship network of co-authors of Arun Joseph

This figure shows the co-authorship network connecting the top 25 collaborators of Arun Joseph. A scholar is included among the top collaborators of Arun Joseph based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Arun Joseph. Arun Joseph is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

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20 of 20 papers shown

1.

Joseph, Arun, et al.. (2024). Efficient Aspect Verification and Debugging of High-Performance Microprocessor Designs. IEEE Design and Test. 41(3). 36–46.

2.

Pálenský, Peter, et al.. (2022). Digital twins and their use in future power systems. SHILAP Revista de lepidopterología. 1(3). 57 indexed citations

3.

Ganguly, Amlan, et al.. (2022). A Survey on Machine Learning Accelerators and Evolutionary Hardware Platforms. IEEE Design and Test. 39(3). 91–116. 26 indexed citations

4.

Pálenský, Peter, et al.. (2021). Digital twins and their use in future power systems. 1. 4–4. 28 indexed citations

5.

Joseph, Arun, et al.. (2019). Heterogeneity Aware Power Abstraction for Hierarchical Power Analysis. 470–475. 1 indexed citations

6.

Joseph, Arun, et al.. (2019). Heterogeneity aware power abstractions for dynamic power dominated FinFET‐based microprocessors. IET Computers & Digital Techniques. 13(6). 524–531. 1 indexed citations

7.

Joseph, Arun, Miloš Cvetković, & Peter Pálenský. (2018). Predictive Mitigation of Short Term Voltage Instability Using a Faster Than Real-Time Digital Replica. Research Repository (Delft University of Technology). 1–6. 11 indexed citations

8.

Pálenský, Peter, et al.. (2017). Cosimulation of Intelligent Power Systems: Fundamentals, Software Architecture, Numerics, and Coupling. IEEE Industrial Electronics Magazine. 11(1). 34–50. 101 indexed citations

9.

Pálenský, Peter, et al.. (2017). Applied Cosimulation of Intelligent Power Systems: Implementing Hybrid Simulators for Complex Power Systems. IEEE Industrial Electronics Magazine. 11(2). 6–21. 51 indexed citations

10.

Joseph, Arun, et al.. (2016). FVCAG. 260–265. 1 indexed citations

11.

Joseph, Arun, et al.. (2015). FirmLeak: A Framework for Efficient and Accurate Runtime Estimation of Leakage Power by Firmware. 24. 464–469. 1 indexed citations

12.

Joseph, Arun, et al.. (2015). Virtual logic netlist: Enabling efficient RTL analysis. 571–576. 2 indexed citations

13.

Joseph, Arun & Nagu Dhanwada. (2014). Process Synchronization in Multi-core Systems Using On-Chip Memories. 11. 210–215. 1 indexed citations

14.

Jacobson, Hans, Arun Joseph, Dharmesh Parikh, Pradip Bose, & Alper Buyuktosunoglu. (2014). Empirically derived abstractions in uncore power modeling for a server-class processor chip. 147–152. 4 indexed citations

15.

Joseph, Arun. (2006). Defect-based testing of LTS digital circuits.

16.

Kerkhoff, Hans G. & Arun Joseph. (2005). Testability Issues in Superconductor Electronics. University of Twente Research Information. 6. 9–9. 1 indexed citations

17.

Joseph, Arun, J. Sesé, J. Flokstra, & Hans G. Kerkhoff. (2005). Structural Testing of the HYPRES Niobium Process. IEEE Transactions on Applied Superconductivity. 15(2). 106–109. 1 indexed citations

18.

Joseph, Arun & Hans G. Kerkhoff. (2004). Towards structural testing of superconductor electronics. University of Twente Research Information. 1. 1182–1191. 2 indexed citations

19.

Joseph, Arun, et al.. (2003). The detection of defects in a niobium tri-layer process. IEEE Transactions on Applied Superconductivity. 13(2). 95–98. 5 indexed citations

20.

Joseph, Arun, et al.. (2002). Application of DfT techniques to a 20 GHz superconductor delta ADC. Microelectronics Journal. 33(10). 791–798. 3 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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