Dharmesh Parikh
- Hardware and Architecture top 2%
- Electrical and Electronic Engineering
- Computer Networks and Communications top 10%
- Information Systems
- Artificial Intelligence
- Co-authors
- Kevin SkadronMircea R. StanKarthik SankaranarayananYan ZhangYingmin LiSivakumar VelusamyTarek AbdelzaherPradip Bose
- Topics
- Parallel Computing and Optimization Techniques (6 papers)Low-power high-performance VLSI design (3 papers)Embedded Systems Design Techniques (3 papers)
- Cited by
- Hardware and ArchitectureComputer Networks and CommunicationsElectrical and Electronic Engineering
- Journals
- IEEE Transactions on ComputersDesign, Automation, and Test in Europe
- Partner nations
- United StatesIndia
In The Last Decade
Dharmesh Parikh
8 papers receiving 262 citations
Peers
Comparison fields: 5 of 21
- Hardware and Architecture 252
- Electrical and Electronic Engineering 196
- Computer Networks and Communications 138
- Information Systems 16
- Artificial Intelligence 6
Countries citing papers authored by Dharmesh Parikh
This map shows the geographic impact of Dharmesh Parikh's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Dharmesh Parikh with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Dharmesh Parikh more than expected).
Fields of papers citing papers by Dharmesh Parikh
This network shows the impact of papers produced by Dharmesh Parikh. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Dharmesh Parikh. The network helps show where Dharmesh Parikh may publish in the future.
Co-authorship network of co-authors of Dharmesh Parikh
This figure shows the co-authorship network connecting the top 25 collaborators of Dharmesh Parikh. A scholar is included among the top collaborators of Dharmesh Parikh based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Dharmesh Parikh. Dharmesh Parikh is excluded from the visualization to improve readability, since they are connected to all nodes in the network.
All Works
| # | Work | Indexed citations |
|---|---|---|
| 1 | 4 | |
| 2 | Hot Leakage: An Architectural, Temperature-Aware Model of Subthreshold and Gate Leakage | 1 |
| 3 | 38 | |
| 4 | 60 | |
| 5 | 30 | |
| 6 | HotLeakage: A Temperature-Aware Model of Subthreshold and Gate Leakage for Architects | 119 |
| 7 | Comparison of State-Preserving vs. Non-State-Preserving Leakage Control in Caches | 13 |
| 8 | Adaptive Cache Decay using Formal Feedback Control | 24 |
About Dharmesh Parikh
Dharmesh Parikh is a scholar working on Hardware and Architecture, Electrical and Electronic Engineering and Philosophy, having authored 8 papers that have together received 289 indexed citations. Recurring topics across this work include Parallel Computing and Optimization Techniques (6 papers), Low-power high-performance VLSI design (3 papers) and Embedded Systems Design Techniques (3 papers). The work is most often cited by research in Hardware and Architecture (252 citations), Computer Networks and Communications (138 citations) and Electrical and Electronic Engineering (196 citations). Dharmesh Parikh has collaborated with scholars based in United States and India. Frequent co-authors include Kevin Skadron, Mircea R. Stan, Karthik Sankaranarayanan, Yan Zhang, Yan Zhang, Yingmin Li, Sivakumar Velusamy, Tarek Abdelzaher, Yan Zhang and Pradip Bose. Their work appears in journals such as IEEE Transactions on Computers and Design, Automation, and Test in Europe.
Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.