Ahmed Elkholy

1.0k citations

43 papers · 786 indexed · h-index 17

Co-authors: Pavan Kumar Hanumolu Amr Elshazly Tejasvi Anand Romesh Kumar Nandwana Woo‐Seok Choi Mostafa G. Ahmed Saurabh Saxena Mrunmay Talegaonkar
Topics: Advancements in PLL and VCO Technologies (38 papers)Radio Frequency Integrated Circuit Design (21 papers)Photonic and Optical Devices (17 papers)
Cited by: Electrical and Electronic Engineering Biomedical Engineering Hardware and Architecture
Journals: IEEE Journal of Solid-State Circuits IEEE Transactions on Circuits & Systems II Express BriefsSeoul National University Open Repository (Seoul National University)
Partner nations: United States India Malaysia

In The Last Decade

Ahmed Elkholy

42 papers receiving 776 citations

Peers

Countries citing papers authored by Ahmed Elkholy

Since Specialization

Citations

This map shows the geographic impact of Ahmed Elkholy's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Ahmed Elkholy with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Ahmed Elkholy more than expected).

Fields of papers citing papers by Ahmed Elkholy

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Ahmed Elkholy. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Ahmed Elkholy. The network helps show where Ahmed Elkholy may publish in the future.

Co-authorship network of co-authors of Ahmed Elkholy

This figure shows the co-authorship network connecting the top 25 collaborators of Ahmed Elkholy. A scholar is included among the top collaborators of Ahmed Elkholy based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Ahmed Elkholy. Ahmed Elkholy is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

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20 of 20 papers shown

#	Work	Indexed citations
1	A 16-Gb/s -11.6-dBm OMA Sensitivity 0.7-pJ/bit Optical Receiver in 65-nm CMOS Enabled by Duobinary Sampling 2021 ·IEEE Journal of Solid-State Circuits ·Mostafa G. Ahmed,(unknown),Romesh Kumar Nandwana,Ahmed Elkholy,K.R. Lakshmikumar,Pavan Kumar Hanumolu	12
2	A 3.2GHz 405fs_rms jitter -237.2dB-FoM_JIT ring-based fractional-N synthesizer using two-step quantization noise cancellation and piecewise-linear nonlinearity correction 2021 ·(unknown),(unknown),(unknown),(unknown),Ahmed Elkholy,Pavan Kumar Hanumolu	3
3	A 12-Gb/s 10-ns Turn-On Time Rapid ON/OFF Baud-Rate DFE Receiver in 65-nm CMOS 2020 ·IEEE Journal of Solid-State Circuits ·(unknown),Mostafa G. Ahmed,Woo‐Seok Choi,Ahmed Elkholy,Pavan Kumar Hanumolu	15
4	A Low-Noise Frequency Synthesizer Using Multiphase Generation and Combining Techniques 2019 ·IEEE Journal of Solid-State Circuits ·(unknown),Ahmed Elkholy,(unknown),Mostafa G. Ahmed,Pavan Kumar Hanumolu	10
5	A 2.5–5.75-GHz Ring-Based Injection-Locked Clock Multiplier With Background-Calibrated Reference Frequency Doubler 2019 ·IEEE Journal of Solid-State Circuits ·Ahmed Elkholy,(unknown),Romesh Kumar Nandwana,(unknown),Pavan Kumar Hanumolu	35
6	A 1.6ps peak-INL 5.3ns range two-step digital-to-time converter in 65nm CMOS 2018 ·(unknown),Mostafa G. Ahmed,Ahmed Elkholy,Woo‐Seok Choi,Pavan Kumar Hanumolu	16
7	A 6.75–8.25-GHz −250-dB FoM Rapid ON/OFF Fractional-N Injection-Locked Clock Multiplier 2018 ·IEEE Journal of Solid-State Circuits ·Ahmed Elkholy,(unknown),Mostafa G. Ahmed,Pavan Kumar Hanumolu	31
8	65nm CMOSにおける時間に基づく積分制御を用いた0.0021mm~21.82mW,2.2GHz PLL【Powered by NICT】 2017 ·IEEE Journal of Solid-State Circuits ·(unknown),(unknown),Guanghua Shu,Ahmed Elkholy,(unknown),(unknown)	1
9	A 2.8 mW/Gb/s, 14 Gb/s Serial Link Transceiver 2017 ·IEEE Journal of Solid-State Circuits ·Saurabh Saxena,Guanghua Shu,Romesh Kumar Nandwana,Mrunmay Talegaonkar,Ahmed Elkholy,Tejasvi Anand,Woo‐Seok Choi,Pavan Kumar Hanumolu	12
10	A 45–75MHz 197–452µW oscillator with 164.6dB FoM and 2.3ps<inf>rms</inf> period jitter in 65nm CMOS 2017 ·Seoul National University Open Repository (Seoul National University) ·(unknown),(unknown),Guanghua Shu,Woo‐Seok Choi,Romesh Kumar Nandwana,Ahmed Elkholy,(unknown),Pavan Kumar Hanumolu	0
11	8.6 A 2.5-to-5.75GHz 5mW 0.3ps<inf>rms</inf>-jitter cascaded ring-based digital injection-locked clock multiplier in 65nm CMOS 2017 ·(unknown),Ahmed Elkholy,Romesh Kumar Nandwana,(unknown),Pavan Kumar Hanumolu	33
12	A 0.0021 mm²1.82 mW 2.2 GHz PLL Using Time-Based Integral Control in 65 nm CMOS 2016 ·IEEE Journal of Solid-State Circuits ·(unknown),Romesh Kumar Nandwana,Guanghua Shu,Ahmed Elkholy,(unknown),Pavan Kumar Hanumolu	26
13	10.6 A 6.75-to-8.25GHz, 250fsrms-integrated-jitter 3.25mW rapid on/off PVT-insensitive fractional-N injection-locked clock multiplier in 65nm CMOS 2016 ·Ahmed Elkholy,(unknown),(unknown),Ken Chang,Pavan Kumar Hanumolu	21
14	19.8 A 0.0021mm2 1.82mW 2.2GHz PLL using time-based integral control in 65nm CMOS 2016 ·(unknown),Romesh Kumar Nandwana,Guanghua Shu,Ahmed Elkholy,Seong‐Joong Kim,Pavan Kumar Hanumolu	12
15	23.1 A 16Mb/s-to-8Gb/s 14.1-to-5.9pJ/b source synchronous transceiver using DVFS and rapid on/off in 65nm CMOS 2016 ·Guanghua Shu,Woo‐Seok Choi,Saurabh Saxena,Seong‐Joong Kim,Mrunmay Talegaonkar,Romesh Kumar Nandwana,Ahmed Elkholy,(unknown),(unknown),Pavan Kumar Hanumolu	5
16	15.4 A 20-to-1000MHz ±14ps peak-to-peak jitter reconfigurable multi-output all-digital clock generator using open-loop fractional dividers in 65nm CMOS 2014 ·Ahmed Elkholy,Amr Elshazly,Saurabh Saxena,Guanghua Shu,Pavan Kumar Hanumolu	21
17	A 4.25GHz–4.75GHz calibration-free fractional-N ring PLL using hybrid phase/current-mode phase interpolator with 13.2dB phase noise improvement 2014 ·Romesh Kumar Nandwana,Tejasvi Anand,Saurabh Saxena,Seong‐Joong Kim,Mrunmay Talegaonkar,Ahmed Elkholy,WooSeok Choi,Amr Elshazly,Pavan Kumar Hanumolu	3
18	A 3.7mW 3MHz bandwidth 4.5GHz digital fractional-N PLL with −106dBc/Hz In-band noise using time amplifier based TDC 2014 ·Ahmed Elkholy,Tejasvi Anand,Woo‐Seok Choi,Amr Elshazly,Pavan Kumar Hanumolu	4
19	A single LC tank self-compensated CMOS oscillator with frequency stability of ±100ppm from −40°C to 85°C 2012 ·(unknown),(unknown),(unknown),Ahmed Elkholy,(unknown),Mohamed O. Saeed,A Helmy,(unknown)	9
20	A highly stable CMOS Self-Compensated Oscillator (SCO) based on an LC tank temperature Null concept 2011 ·(unknown),Bassel Hanafi,(unknown),(unknown),(unknown),(unknown),(unknown),Ahmed Elkholy,(unknown),A Helmy	7

About Ahmed Elkholy

Ahmed Elkholy is a scholar working on Electrical and Electronic Engineering, Biomedical Engineering and Computer Networks and Communications, having authored 43 papers that have together received 786 indexed citations. Recurring topics across this work include Advancements in PLL and VCO Technologies (38 papers), Radio Frequency Integrated Circuit Design (21 papers) and Photonic and Optical Devices (17 papers). The work is most often cited by research in Electrical and Electronic Engineering (771 citations), Biomedical Engineering (332 citations) and Hardware and Architecture (17 citations). Ahmed Elkholy has collaborated with scholars based in United States, India and Malaysia. Frequent co-authors include Pavan Kumar Hanumolu, Pavan Kumar Hanumolu, Amr Elshazly, Tejasvi Anand, Romesh Kumar Nandwana, Woo‐Seok Choi, Mostafa G. Ahmed, Saurabh Saxena, Mrunmay Talegaonkar and Guanghua Shu. Their work appears in journals such as IEEE Journal of Solid-State Circuits, IEEE Transactions on Circuits & Systems II Express Briefs and Seoul National University Open Repository (Seoul National University).

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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