Chunyu Peng

1.1k total citations
95 papers, 738 citations indexed

About

Chunyu Peng is a scholar working on Electrical and Electronic Engineering, Hardware and Architecture and Biomedical Engineering. According to data from OpenAlex, Chunyu Peng has authored 95 papers receiving a total of 738 indexed citations (citations by other indexed papers that have themselves been cited), including 91 papers in Electrical and Electronic Engineering, 26 papers in Hardware and Architecture and 12 papers in Biomedical Engineering. Recurrent topics in Chunyu Peng's work include Advanced Memory and Neural Computing (36 papers), Semiconductor materials and devices (34 papers) and Ferroelectric and Negative Capacitance Devices (27 papers). Chunyu Peng is often cited by papers focused on Advanced Memory and Neural Computing (36 papers), Semiconductor materials and devices (34 papers) and Ferroelectric and Negative Capacitance Devices (27 papers). Chunyu Peng collaborates with scholars based in China, United Kingdom and United States. Chunyu Peng's co-authors include Xiulong Wu, Zhiting Lin, Junning Chen, Qiang Zhao, Wenjuan Lu, Changyong Liu, Xuan Zeng, Yuan Yao, Licai Hao and Mengmeng Jin and has published in prestigious journals such as International Journal of Hydrogen Energy, IEEE Journal of Solid-State Circuits and Neurocomputing.

In The Last Decade

Chunyu Peng

82 papers receiving 709 citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name h Career Trend Papers Cites
Chunyu Peng China 14 697 225 50 36 35 95 738
Po-Hui Yang Taiwan 11 549 0.8× 219 1.0× 48 1.0× 38 1.1× 134 3.8× 60 648
Saman Kiamehr Germany 18 712 1.0× 289 1.3× 39 0.8× 55 1.5× 30 0.9× 61 781
Pierluigi Civera Italy 12 395 0.6× 229 1.0× 67 1.3× 33 0.9× 144 4.1× 54 550
Syed M. Alam United States 13 489 0.7× 78 0.3× 80 1.6× 17 0.5× 25 0.7× 30 537
Mayler G. A. Martins Brazil 12 366 0.5× 184 0.8× 67 1.3× 45 1.3× 10 0.3× 29 436
Taehui Na South Korea 15 552 0.8× 78 0.3× 42 0.8× 29 0.8× 48 1.4× 41 598
Eric Karl United States 19 843 1.2× 287 1.3× 130 2.6× 18 0.5× 39 1.1× 41 935
Po-Tsang Huang Taiwan 14 451 0.6× 155 0.7× 174 3.5× 54 1.5× 87 2.5× 93 638
Nurrachman Liu United States 9 396 0.6× 179 0.8× 96 1.9× 13 0.4× 128 3.7× 10 476
T. Kirihata United States 15 500 0.7× 266 1.2× 128 2.6× 31 0.9× 41 1.2× 50 570

Countries citing papers authored by Chunyu Peng

Since Specialization
Citations

This map shows the geographic impact of Chunyu Peng's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Chunyu Peng with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Chunyu Peng more than expected).

Fields of papers citing papers by Chunyu Peng

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Chunyu Peng. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Chunyu Peng. The network helps show where Chunyu Peng may publish in the future.

Co-authorship network of co-authors of Chunyu Peng

This figure shows the co-authorship network connecting the top 25 collaborators of Chunyu Peng. A scholar is included among the top collaborators of Chunyu Peng based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Chunyu Peng. Chunyu Peng is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
1.
Zhao, Qiang, Licai Hao, Chunyu Peng, et al.. (2025). A double-modules interlocking triple-node upset-tolerant latch design. Microelectronics Journal. 159. 106647–106647.
2.
Zhang, Jianhao, Ruixuan Wang, Junbo Chen, et al.. (2025). A PVT-insensitive 7T SRAM CIM macro for multibit multiplication with dynamic matching quantization circuits. Microelectronics Journal. 161. 106703–106703.
3.
Li, Xin, et al.. (2025). Full-Array Boolean Logic CIM Macro With Self-Recycling 10T-SRAM Cell for AES Systems. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 33(8). 2214–2224.
4.
Li, Xin, et al.. (2025). High-Efficiency Calibration Methodology of Interchannel Mismatches in TIADCs Based on Digital Orthogonal Local Oscillation Signal. IEEE Transactions on Instrumentation and Measurement. 74. 1–11. 1 indexed citations
5.
Zhao, Qiang, Chunhai Fan, Ziming Wang, et al.. (2024). An 11-bit two-step column-shared ADC based on Flash/SS architecture for CMOS image sensor. Microelectronics Journal. 154. 106444–106444. 4 indexed citations
6.
Zhou, Yongliang, et al.. (2024). An 8b-Precison 16-Kb FDSOI 8T SRAM CIM macro based on time-domain for energy-efficient edge AI devices. Microelectronics Journal. 151. 106308–106308. 1 indexed citations
7.
Lin, Zhiting, Da Huo, Yanchun Liu, et al.. (2024). A 28-nm 9T SRAM-based CIM macro with capacitance weighting module and redundant array-assisted ADC. Microelectronics Journal. 153. 106397–106397. 2 indexed citations
8.
Zhao, Qiang, Licai Hao, Chunyu Peng, et al.. (2024). Design of polarity hardening SRAM for mitigating single event multiple node upsets. Microelectronics Journal. 149. 106214–106214. 1 indexed citations
9.
Wu, Xiulong, Yongliang Zhou, Chunyu Peng, et al.. (2024). Configurable in-memory computing architecture based on dual-port SRAM. Microelectronics Journal. 147. 106163–106163. 2 indexed citations
10.
Hao, Licai, Xinyi Zhang, Yang Li, et al.. (2024). Low-Cost and Highly Robust Quadruple Node Upset Tolerant Latch Design. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 32(5). 883–896. 8 indexed citations
11.
Zhou, Yongliang, Yiming Wei, Lin Xiao, et al.. (2024). A Timing-Shared Adaptive Sensing Methodology for Low-Voltage SRAM. 1–5.
12.
Liu, Haitao, Mengya Gao, Wenjuan Lu, et al.. (2023). A 9T-SRAM in-memory computing macro for Boolean logic and multiply-and-accumulate operations. Microelectronics Journal. 144. 106087–106087. 2 indexed citations
13.
Shi, Qi, Hao Zheng, Wenjuan Lu, et al.. (2023). Bit-line leakage current tracking and self-compensation circuit for SRAM reliability design. Microelectronics Journal. 132. 105699–105699. 4 indexed citations
14.
Hao, Licai, Li Liu, Qi Shi, et al.. (2023). Design of radiation-hardened memory cell by polar design for space applications. Microelectronics Journal. 132. 105691–105691. 8 indexed citations
15.
Lin, Zhiting, Guangdong Li, Ruixuan Wang, et al.. (2023). Configurable and High-Throughput CIM SRAM for Boolean Logic Operation With 321 GOPS/kb and 164395.6 GOPS/mm2. IEEE Solid-State Circuits Letters. 6. 153–156. 5 indexed citations
16.
Lin, Zhiting, Jianping Xia, Yunwei Liu, et al.. (2023). A Fully Digital SRAM-Based Four-Layer In-Memory Computing Unit Achieving Multiplication Operations and Results Store. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 31(6). 776–788. 12 indexed citations
17.
Lin, Zhiting, Xiulong Wu, Qiang Zhao, et al.. (2022). Configurable Memory With a Multilevel Shared Structure Enabling In-Memory Computing. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 30(5). 566–578. 7 indexed citations
18.
Lin, Zhiting, Fang‐Ming Wang, Peng Sun, et al.. (2022). In Situ Storing 8T SRAM-CIM Macro for Full-Array Boolean Logic and Copy Operations. IEEE Journal of Solid-State Circuits. 58(5). 1472–1486. 17 indexed citations
19.
Lin, Zhiting, Panpan Chen, Le Ye, et al.. (2020). Challenges and Solutions of the TFET Circuit Design. IEEE Transactions on Circuits and Systems I Regular Papers. 67(12). 4918–4931. 21 indexed citations
20.
Peng, Chunyu, et al.. (2020). Reverse Bias Current Eliminated, Read-Separated, and Write-Enhanced Tunnel FET SRAM. IEEE Transactions on Circuits & Systems II Express Briefs. 68(1). 466–470. 5 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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