Yoshio Masubuchi
- Hardware and Architecture top 2%
- Computer Networks and Communications top 5%
- Electrical and Electronic Engineering
- Computer Vision and Pattern Recognition
- Artificial Intelligence
- Topics
- Parallel Computing and Optimization Techniques (5 papers)Interconnection Networks and Systems (3 papers)Embedded Systems Design Techniques (3 papers)
- Cited by
- Hardware and ArchitectureComputer Networks and CommunicationsElectrical and Electronic Engineering
- Journals
- Electronics and Communications in Japan (Part III Fundamental Electronic Science)Asia and South Pacific Design Automation Conference
- Partner nations
- JapanUnited States
In The Last Decade
Yoshio Masubuchi
7 papers receiving 396 citations
Hit Papers
Peers
Comparison fields: 5 of 40
- Hardware and Architecture 295
- Computer Networks and Communications 239
- Electrical and Electronic Engineering 168
- Computer Vision and Pattern Recognition 51
- Artificial Intelligence 29
Countries citing papers authored by Yoshio Masubuchi
This map shows the geographic impact of Yoshio Masubuchi's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Yoshio Masubuchi with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Yoshio Masubuchi more than expected).
Fields of papers citing papers by Yoshio Masubuchi
This network shows the impact of papers produced by Yoshio Masubuchi. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Yoshio Masubuchi. The network helps show where Yoshio Masubuchi may publish in the future.
Co-authorship network of co-authors of Yoshio Masubuchi
This figure shows the co-authorship network connecting the top 25 collaborators of Yoshio Masubuchi. A scholar is included among the top collaborators of Yoshio Masubuchi based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Yoshio Masubuchi. Yoshio Masubuchi is excluded from the visualization to improve readability, since they are connected to all nodes in the network.
All Works
| # | Work | Indexed citations |
|---|---|---|
| 1 | 1 | |
| 2 | 12 | |
| 3 | 15 | |
| 4 | The design and implementation of a first-generation CELL processorbreakdown → | 371 |
| 5 | 22 | |
| 6 | 11 | |
| 7 | Highly Reliable Server with QRM | 0 |
| 8 | 1 |
About Yoshio Masubuchi
Yoshio Masubuchi is a scholar working on Hardware and Architecture, Computer Networks and Communications and Media Technology, having authored 8 papers that have together received 433 indexed citations. Recurring topics across this work include Parallel Computing and Optimization Techniques (5 papers), Interconnection Networks and Systems (3 papers) and Embedded Systems Design Techniques (3 papers). The work is most often cited by research in Hardware and Architecture (295 citations), Computer Networks and Communications (239 citations) and Electrical and Electronic Engineering (168 citations). Yoshio Masubuchi has collaborated with scholars based in Japan and United States. Frequent co-authors include D. Pham, C. Johns, Kazuaki Yazawa, Atsushi Kameyama, J. Keaty, J. Warnock, D. Wendel, S. Asano, S. Weitzel and H. Peter Hofstee. Their work appears in journals such as Electronics and Communications in Japan (Part III Fundamental Electronic Science) and Asia and South Pacific Design Automation Conference.
Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.