Yoshio Masubuchi

884 total citations · 1 hit paper
8 papers, 433 citations indexed

About

Yoshio Masubuchi is a scholar working on Hardware and Architecture, Computer Networks and Communications and Electrical and Electronic Engineering. According to data from OpenAlex, Yoshio Masubuchi has authored 8 papers receiving a total of 433 indexed citations (citations by other indexed papers that have themselves been cited), including 6 papers in Hardware and Architecture, 5 papers in Computer Networks and Communications and 3 papers in Electrical and Electronic Engineering. Recurrent topics in Yoshio Masubuchi's work include Parallel Computing and Optimization Techniques (5 papers), Interconnection Networks and Systems (3 papers) and Embedded Systems Design Techniques (3 papers). Yoshio Masubuchi is often cited by papers focused on Parallel Computing and Optimization Techniques (5 papers), Interconnection Networks and Systems (3 papers) and Embedded Systems Design Techniques (3 papers). Yoshio Masubuchi collaborates with scholars based in Japan and United States. Yoshio Masubuchi's co-authors include D. Pham, C. Johns, Kazuaki Yazawa, Atsushi Kameyama, J. Keaty, J. Warnock, D. Wendel, S. Asano, S. Weitzel and H. Peter Hofstee and has published in prestigious journals such as Electronics and Communications in Japan (Part III Fundamental Electronic Science) and Asia and South Pacific Design Automation Conference.

In The Last Decade

Yoshio Masubuchi

7 papers receiving 396 citations

Hit Papers

align trajectories

What are hit papers?

Hit papers significantly outperform the citation benchmark for their cohort. A paper qualifies if it has ≥500 total citations, achieves ≥1.5× the top-1% citation threshold for papers in the same subfield and year (this is the minimum needed to enter the top 1%, not the average within it), or reaches the top citation threshold in at least one of its specific research topics.

The design and implementation of a first-generation CELL processor

2005 371 citations D. Pham, S. Asano et al. profile →

Peers

Yoshio Masubuchi

HA

CNC

EEE

CVPR

AI

D. Pham United States

D. Stasiak United States

M. Riley United States

T. Yamazaki Japan

Mingjun Wang United States

J. Keaty United States

S. Weitzel United States

D. Wendel United States

B. Flachs United States

M. Suzuoki Japan

D. Pham United States

Yoshio Masubuchi

296 ×1.0

HA

230 ×1.0

CNC

159 ×0.9

EEE

38 ×0.7

CVPR

28 ×1.0

AI

Citations per year, relative to Yoshio Masubuchi Yoshio Masubuchi (= 1×) peers D. Pham

Countries citing papers authored by Yoshio Masubuchi

Since Specialization

Citations

This map shows the geographic impact of Yoshio Masubuchi's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Yoshio Masubuchi with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Yoshio Masubuchi more than expected).

Fields of papers citing papers by Yoshio Masubuchi

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Yoshio Masubuchi. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Yoshio Masubuchi. The network helps show where Yoshio Masubuchi may publish in the future.

Co-authorship network of co-authors of Yoshio Masubuchi

This figure shows the co-authorship network connecting the top 25 collaborators of Yoshio Masubuchi. A scholar is included among the top collaborators of Yoshio Masubuchi based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Yoshio Masubuchi. Yoshio Masubuchi is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

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8 of 8 papers shown

1.

Ohara, Yasuo, et al.. (2011). Development of low power and high performance application processor (T6G) for multimedia mobile applications. Asia and South Pacific Design Automation Conference. 755–759. 1 indexed citations

2.

Pham, D., H. Peter Hofstee, C. Johns, et al.. (2006). The design methodology and implementation of a first-generation CELL processor: a multi-core SoC. 44–49. 12 indexed citations

3.

Pham, D., S. Asano, Michael Day, et al.. (2005). The design and implementation of a first-generation CELL processor - a multi-core SoC. 49–52. 15 indexed citations

4.

Pham, D., S. Asano, Michael Day, et al.. (2005). The design and implementation of a first-generation CELL processor. 184–186. 371 indexed citations breakdown →

5.

Miyamori, Takashi, et al.. (2002). A 4 GOPS 3 way-VLIW image recognition processor based on a configurable media-processor. 148–149,. 22 indexed citations

6.

Masubuchi, Yoshio, et al.. (2002). Fault recovery mechanism for multiprocessor servers. 184–193. 11 indexed citations

7.

Mizuno, Satoshi, et al.. (1996). Highly Reliable Server with QRM. 96(397). 65–72.

8.

Masubuchi, Yoshio, et al.. (1990). LSI logic synthesis expert system. Electronics and Communications in Japan (Part III Fundamental Electronic Science). 73(8). 10–21. 1 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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