W.J. Bainbridge

469 total citations
11 papers, 310 citations indexed

About

W.J. Bainbridge is a scholar working on Hardware and Architecture, Computer Networks and Communications and Electrical and Electronic Engineering. According to data from OpenAlex, W.J. Bainbridge has authored 11 papers receiving a total of 310 indexed citations (citations by other indexed papers that have themselves been cited), including 10 papers in Hardware and Architecture, 6 papers in Computer Networks and Communications and 6 papers in Electrical and Electronic Engineering. Recurrent topics in W.J. Bainbridge's work include Interconnection Networks and Systems (6 papers), Embedded Systems Design Techniques (6 papers) and Low-power high-performance VLSI design (5 papers). W.J. Bainbridge is often cited by papers focused on Interconnection Networks and Systems (6 papers), Embedded Systems Design Techniques (6 papers) and Low-power high-performance VLSI design (5 papers). W.J. Bainbridge collaborates with scholars based in United Kingdom, Venezuela and United States. W.J. Bainbridge's co-authors include Steve Furber, D. Edwards, Steve Temple, Luis A. Plana, Jim Garside, Siamak Mohammadi, David M. Clark, D.W. Lloyd, J.V. Woods and Wei Song and has published in prestigious journals such as Neural Networks, Microprocessors and Microsystems and Research Explorer (The University of Manchester).

In The Last Decade

W.J. Bainbridge

11 papers receiving 285 citations

Peers

Countries citing papers authored by W.J. Bainbridge

Since Specialization

Citations

This map shows the geographic impact of W.J. Bainbridge's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by W.J. Bainbridge with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites W.J. Bainbridge more than expected).

Fields of papers citing papers by W.J. Bainbridge

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by W.J. Bainbridge. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by W.J. Bainbridge. The network helps show where W.J. Bainbridge may publish in the future.

Co-authorship network of co-authors of W.J. Bainbridge

This figure shows the co-authorship network connecting the top 25 collaborators of W.J. Bainbridge. A scholar is included among the top collaborators of W.J. Bainbridge based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with W.J. Bainbridge. W.J. Bainbridge is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

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11 of 11 papers shown

#	Work	Indexed citations
1	Area efficient asynchronous SDM routers using 2-stage Clos switches 2012 ·Wei Song, (unknown), Jim Garside, W.J. Bainbridge	1
2	Glitch Sensitivity and Defense of Quasi Delay-Insensitive Network-on-Chip Links 2009 ·W.J. Bainbridge, (unknown)	16
3	The design and test of a smartcard chip using a CHAIN self-timed network-on-chip 2004 ·Design, Automation, and Test in Europe ·W.J. Bainbridge, Luis A. Plana, Steve Furber	15
4	Sparse distributed memory using N-of-M codes 2004 ·Neural Networks ·Steve Furber, W.J. Bainbridge, (unknown), Steve Temple	29
5	SPA - a synthesisable Amulet core for smartcard applications 2004 ·Research Explorer (The University of Manchester) ·Luis A. Plana, (unknown), W.J. Bainbridge, (unknown), Jim Garside, Steve Temple	27
6	Delay-insensitive, point-to-point interconnect using m-of-n codes 2003 ·Research Explorer (The University of Manchester) ·W.J. Bainbridge, (unknown), D. Edwards, Steve Furber	80
7	SPA—a secure Amulet core for smartcard applications 2003 ·Microprocessors and Microsystems ·Luis A. Plana, (unknown), W.J. Bainbridge, (unknown), Steve Temple, Jim Garside, (unknown)	13
8	Delay insensitive system-on-chip interconnect using 1-of-4 data encoding 2002 ·Research Explorer (The University of Manchester) ·W.J. Bainbridge, Steve Furber	63
9	Asynchronous macrocell interconnect using MARBLE 2002 ·W.J. Bainbridge, Steve Furber	25
10	AMULET3i-an asynchronous system-on-chip 2002 ·Research Explorer (The University of Manchester) ·Jim Garside, W.J. Bainbridge, (unknown), David M. Clark, D. Edwards, Steve Furber, (unknown), D.W. Lloyd, Siamak Mohammadi, (unknown), (unknown), Steve Temple, J.V. Woods	34
11	MARBLE: an asynchronous on-chip macrocell bus 2000 ·Microprocessors and Microsystems ·W.J. Bainbridge, Steve Furber	7

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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