V.A. Chouliaras

437 total citations
44 papers, 298 citations indexed

About

V.A. Chouliaras is a scholar working on Hardware and Architecture, Signal Processing and Electrical and Electronic Engineering. According to data from OpenAlex, V.A. Chouliaras has authored 44 papers receiving a total of 298 indexed citations (citations by other indexed papers that have themselves been cited), including 20 papers in Hardware and Architecture, 19 papers in Signal Processing and 16 papers in Electrical and Electronic Engineering. Recurrent topics in V.A. Chouliaras's work include Embedded Systems Design Techniques (12 papers), Video Coding and Compression Technologies (12 papers) and Parallel Computing and Optimization Techniques (12 papers). V.A. Chouliaras is often cited by papers focused on Embedded Systems Design Techniques (12 papers), Video Coding and Compression Technologies (12 papers) and Parallel Computing and Optimization Techniques (12 papers). V.A. Chouliaras collaborates with scholars based in United Kingdom, Greece and Italy. V.A. Chouliaras's co-authors include Dionysios Reisis, K. Manolopoulos, Jose Nunez‐Yanez, David Mulvaney, Sijung Hu, Jia Zheng, V. M. Dwyer, Zhiliang Zhu, R. Summers and R.M. Goodall and has published in prestigious journals such as Neurocomputing, IEEE Transactions on Computers and Electronics Letters.

In The Last Decade

V.A. Chouliaras

41 papers receiving 287 citations

Peers

Countries citing papers authored by V.A. Chouliaras

Since Specialization

Citations

This map shows the geographic impact of V.A. Chouliaras's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by V.A. Chouliaras with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites V.A. Chouliaras more than expected).

Fields of papers citing papers by V.A. Chouliaras

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by V.A. Chouliaras. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by V.A. Chouliaras. The network helps show where V.A. Chouliaras may publish in the future.

Co-authorship network of co-authors of V.A. Chouliaras

This figure shows the co-authorship network connecting the top 25 collaborators of V.A. Chouliaras. A scholar is included among the top collaborators of V.A. Chouliaras based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with V.A. Chouliaras. V.A. Chouliaras is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

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20 of 20 papers shown

#	Work	Indexed citations
1	Marketing's Contribution to the Profitability of Greek Enterprises During the Economic Crisis. 2015 ·Procedia Economics and Finance ·V.A. Chouliaras, (unknown), (unknown)	5
2	Bidirectional electromigration failure 2013 ·Microelectronics Reliability ·Myo–Taeg Lim, V.A. Chouliaras, Chee Lip Gan, V. M. Dwyer	3
3	BioThreads: A Novel VLIW-Based Chip Multiprocessor for Accelerating Biomedical Image Processing Applications 2011 ·IEEE Transactions on Biomedical Circuits and Systems ·David Stevens, V.A. Chouliaras, (unknown), Jia Zheng, (unknown), Sijung Hu	10
4	An efficient multiple precision floating-point multiplier 2011 ·K. Manolopoulos, Dionysios Reisis, V.A. Chouliaras	15
5	Evaluating the performance of a configurable, extensible VLIW processor in FFT execution 2009 ·David Stevens, (unknown), (unknown), V.A. Chouliaras, Dionysios Reisis	3
6	A configurable length, Fused Multiply-Add floating point unit for a VLIW processor 2009 ·V.A. Chouliaras, K. Manolopoulos, Dionysios Reisis	2
7	Efficient cascaded VLSI FFT architecture for OFDM systems 2009 ·V.A. Chouliaras, (unknown), (unknown), Dionysios Reisis, (unknown)	2
8	Fully Systolic FFT Architecture for Giga-sample Applications 2009 ·Journal of Signal Processing Systems ·(unknown), V.A. Chouliaras, K. Manolopoulos, (unknown), Dionysios Reisis, (unknown)	6
9	High Performance 16K, 64K, 256K complex points VLSI Systolic FFT Architectures 2007 ·K. Manolopoulos, (unknown), Dionysios Reisis, (unknown), V.A. Chouliaras	4
10	SystemC-defined SIMD instructions for a CMP/SMT ASIC platform 2006 ·V.A. Chouliaras, (unknown), (unknown), (unknown), David Mulvaney, (unknown)	1
11	A system-on-chip vector multiprocessor for transmission line modelling acceleration 2006 ·Loughborough University Institutional Repository (Loughborough University) ·V.A. Chouliaras, James A. Flint, Yibin Li, Jose Nunez‐Yanez	1
12	Hardware Assisted Rate Distortion Optimization with Embedded CABAC Accelerator for the H.264 Advanced Video Codec 2006 ·IEEE Transactions on Consumer Electronics ·Jose Nunez‐Yanez, V.A. Chouliaras, (unknown), (unknown)	21
13	Quantifying the benefit of thread and data parallelism for fast motion estimation in MPEG-2 2006 ·Electronics Letters ·V.A. Chouliaras, (unknown), (unknown), V. M. Dwyer	5
14	Thread-Parallel MPEG-4 and H. 264 Coders for System-on-Chip Multi-Processor Architectures 2006 ·(unknown), V.A. Chouliaras, David Mulvaney	2
15	Modelling multiple faults in fault-tolerant processor architectures 2005 ·Electronics Letters ·(unknown), James A. Flint, V.A. Chouliaras, David Ward	1
16	Motion estimation with low resolution distortion metric 2005 ·Electronics Letters ·(unknown), V. M. Dwyer, V.A. Chouliaras	8
17	High-performance arithmetic coding VLSI macro for the H.264 video compression standard 2005 ·(unknown), V.A. Chouliaras	2
18	A multi-standard video coding accelerator based on a vector architecture 2005 ·V.A. Chouliaras, (unknown), (unknown), (unknown)	6
19	An application-specific processor hard macro for real-time control 2004 ·Xiaofeng Wu, V.A. Chouliaras, R.M. Goodall	0
20	Scalar coprocessors for accelerating the G723.1 and G729A speech coders 2003 ·IEEE Transactions on Consumer Electronics ·V.A. Chouliaras, (unknown)	7

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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