T.S. Fiez
-
- Radio Frequency Integrated Circuit Design 41
- Low-power high-performance VLSI design 39
- Advancements in Semiconductor Devices and Circuit Design 38
- Advancements in PLL and VCO Technologies 36
- CCD and CMOS Imaging Sensors 27
- Electromagnetic Compatibility and Noise Suppression 22
- VLSI and FPGA Design Techniques 14
- Biomedical Engineering top 1%
- Analog and Mixed-Signal Circuit Design 85
- Architecture top 2%
- Hardware and Architecture top 5%
- Mechanical Engineering top 5%
- Co-authors
- R.T. BairdKartikeya MayaramD.J. AllstotA. EshraghiAnnette von JouanneJae‐Kyung HanTaoran LeGuangsheng Liang
- Journals
- IEEE Journal of Solid-State Circuits (28 papers)IEEE Transactions on Electron Devices (1 paper)Electronics Letters (1 paper)
- Partner nations
- United StatesNetherlandsGermany
In The Last Decade
T.S. Fiez
163 papers receiving 3.3k citations
Hit Papers
Peers
Comparison fields: 5 of 86
- Electrical and Electronic Engineering 3.2k
- Biomedical Engineering 2.0k
- Architecture 35
- Hardware and Architecture 143
- Mechanical Engineering 572
Countries citing papers authored by T.S. Fiez
This map shows the geographic impact of T.S. Fiez's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by T.S. Fiez with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites T.S. Fiez more than expected).
Fields of papers citing papers by T.S. Fiez
This network shows the impact of papers produced by T.S. Fiez. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by T.S. Fiez. The network helps show where T.S. Fiez may publish in the future.
Co-authorship network
The 25 scholars most cited alongside T.S. Fiez, linked wherever they have co-authored with each other. Click a name or a connecting line to browse the papers they share.
All Works
| # | Work | ||
|---|---|---|---|
| 1 | 2017 | 1 | |
| 2 | 2012 | 0 | |
| 3 | 2010 | 1 | |
| 4 | 2010 | 9 | |
| 5 | 2004 | 1 | |
| 6 | 2004 | 66 | |
| 7 | 2004 | 34 | |
| 8 | 2004 | 5 | |
| 9 | 2004 | 0 | |
| 10 | 2003 | 1 | |
| 11 | 2003 | 4 | |
| 12 | 2002 | 4 | |
| 13 | 2002 | 8 | |
| 14 | 2002 | 2 | |
| 15 | 2002 | 2 | |
| 16 | 2002 | 6 | |
| 17 | 1999 | 4 | |
| 18 | 1999 | 6 | |
| 19 | Improved Delta-Sigma DAC Linearity Using Data Weighted Averaging. | 1995 | 55 |
| 20 | 1994 | 73 |
About T.S. Fiez
T.S. Fiez is a scholar working on Architecture, Electrical and Electronic Engineering and Biomedical Engineering, having authored 169 papers that have together received 3.5k indexed citations. Recurring topics across this work include Analog and Mixed-Signal Circuit Design (85 papers), Radio Frequency Integrated Circuit Design (41 papers), Low-power high-performance VLSI design (39 papers), Advancements in Semiconductor Devices and Circuit Design (38 papers), Advancements in PLL and VCO Technologies (36 papers), CCD and CMOS Imaging Sensors (27 papers), Electromagnetic Compatibility and Noise Suppression (22 papers) and VLSI and FPGA Design Techniques (14 papers). The work is most often cited by research in Electrical and Electronic Engineering (3.2k citations), Biomedical Engineering (2.0k citations) and Architecture (35 citations). T.S. Fiez has collaborated with scholars based in United States, Netherlands and Germany. Frequent co-authors include R.T. Baird, Kartikeya Mayaram, D.J. Allstot, A. Eshraghi, Annette von Jouanne, Jae‐Kyung Han, Taoran Le, Guangsheng Liang, Thomas W. Brown and Rajesh Zele. Their work appears in journals such as IEEE Journal of Solid-State Circuits, IEEE Transactions on Electron Devices and Electronics Letters.
Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.