Trevor Mudge
About
In The Last Decade
Trevor Mudge
388 papers receiving 18.8k citations
Hit Papers
Peers
Comparison fields: 5 of 135
- Hardware and Architecture 12.8k
- Computer Networks and Communications 10.1k
- Electrical and Electronic Engineering 9.7k
- Artificial Intelligence 2.2k
- Information Systems 2.0k
Countries citing papers authored by Trevor Mudge
This map shows the geographic impact of Trevor Mudge's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Trevor Mudge with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Trevor Mudge more than expected).
Fields of papers citing papers by Trevor Mudge
This network shows the impact of papers produced by Trevor Mudge. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Trevor Mudge. The network helps show where Trevor Mudge may publish in the future.
Co-authorship network of co-authors of Trevor Mudge
This figure shows the co-authorship network connecting the top 25 collaborators of Trevor Mudge. A scholar is included among the top collaborators of Trevor Mudge based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Trevor Mudge. Trevor Mudge is excluded from the visualization to improve readability, since they are connected to all nodes in the network.
All Works
| # | Work | Indexed citations |
|---|---|---|
| 1 | 1 | |
| 2 | 5 | |
| 3 | 15 | |
| 4 | 144 | |
| 5 | Razor: a low-power pipeline based on circuit-level timing speculation breakdown → | 769 |
| 6 | 18 | |
| 7 | Power: A First Class Design Constraint for Future Architecture and Automation | 20 |
| 8 | 1 | |
| 9 | Efficient Execution of Compressed Programs | 31 |
| 10 | Performance Limits of Trace Caches | 17 |
| 11 | 135 | |
| 12 | Architectural trade-offs in a latency-tolerant gallium arsenide microprocessor. | 5 |
| 13 | A Parallel Genetic Algorithm for Multiobjective Microprocessor Design | 20 |
| 14 | 27 | |
| 15 | 37 | |
| 16 | Kernel-Based Memory Simulation. | 3 |
| 17 | CROSSPOINT CACHE ARCHITECTURES. | 7 |
| 18 | Instruction Level Mechanisms for Accurate Real-time Task Scheduling. | 12 |
| 19 | A Semi-Markov Model for the Performance of Multiple-Bus Systems. | 0 |
| 20 | Equivalence of two formulations for robot arm dynamics | 7 |
Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.