Tomohiro Yoneda
- Hardware and Architecture top 5%
- Embedded Systems Design Techniques 31
- Parallel Computing and Optimization Techniques 17
- VLSI and Analog Circuit Testing 15
- Genetics top 5%
- Software top 5%
- Model-Driven Software Engineering Techniques 6
-
- Formal Methods in Verification 26
- Petri Nets in System Modeling 14
- Rehabilitation top 10%
-
- Interconnection Networks and Systems 28
-
- Low-power high-performance VLSI design 17
- Co-authors
- Akiyoshi UezumiMasahiko YamaguchiKazutake TsujikawaSo‐ichiro FukadaShin’ichi TakedaTakahito ItoRyo OgawaYuko Miyagoe‐Suzuki
- Partner nations
- JapanUnited StatesGermany
In The Last Decade
Tomohiro Yoneda
65 papers receiving 1.0k citations
Hit Papers
Peers
Comparison fields: 5 of 95
- Hardware and Architecture 238
- Genetics 176
- Software 60
- Computational Theory and Mathematics 209
- Rehabilitation 68
Countries citing papers authored by Tomohiro Yoneda
This map shows the geographic impact of Tomohiro Yoneda's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Tomohiro Yoneda with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Tomohiro Yoneda more than expected).
Fields of papers citing papers by Tomohiro Yoneda
This network shows the impact of papers produced by Tomohiro Yoneda. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Tomohiro Yoneda. The network helps show where Tomohiro Yoneda may publish in the future.
Co-authorship network
The 25 scholars most cited alongside Tomohiro Yoneda, linked wherever they have co-authored with each other. Click a name or a connecting line to browse the papers they share.
All Works
| # | Work | ||
|---|---|---|---|
| 1 | 2024 | 1 | |
| 2 | 2023 | 25 | |
| 3 | 2023 | 3 | |
| 4 | 2023 | 3 | |
| 5 | 2023 | 0 | |
| 6 | 2022 | 2 | |
| 7 | 2016 | 6 | |
| 8 | 2015 | 14 | |
| 9 | A Multi-Task Scheduling and Allocation for Highly Reliable Network-on-Chip | 2013 | 1 |
| 10 | A Case Study on Dependable Network-on-Chip Platform for Automotive Applications | 2011 | 2 |
| 11 | Increasing Dependability based on Asynchronous Computation | 2010 | 0 |
| 12 | Comparison of standard cell based non-linear asynchronous pipelines (VLSI設計技術) | 2007 | 2 |
| 13 | Asynchronous Data-Path Circuit Synthesis by Using Force-Directed Scheduling Algorithm and Consideration to Improve Efficiency | 2004 | 1 |
| 14 | Partial Order Reduction for Timed Circuit Verification Based on Level Oriented Model | 2003 | 0 |
| 15 | Modular Synthesis of Timed Circuits Using Partial Order Reduction | 2002 | 5 |
| 16 | 2001 | 11 | |
| 17 | Partial Order Reduction in Symbolic State Space Traversal Using ZBDDs | 1999 | 1 |
| 18 | Verification of Scalable-Delay-Insensitive Asynchronous Circuits | 1999 | 1 |
| 19 | CTL model checking of time petri nets using geometric regions | 1998 | 36 |
| 20 | Implementation of Interrupt Handler for Loosely-Synchronized TMR Systems | 1985 | 2 |
About Tomohiro Yoneda
Tomohiro Yoneda is a scholar working on Hardware and Architecture, Software and Computational Theory and Mathematics, having authored 76 papers that have together received 1.1k indexed citations. Recurring topics across this work include Embedded Systems Design Techniques (31 papers), Interconnection Networks and Systems (28 papers), Formal Methods in Verification (26 papers), Low-power high-performance VLSI design (17 papers), Parallel Computing and Optimization Techniques (17 papers), VLSI and Analog Circuit Testing (15 papers), Petri Nets in System Modeling (14 papers) and Model-Driven Software Engineering Techniques (6 papers). The work is most often cited by research in Hardware and Architecture (238 citations), Genetics (176 citations) and Software (60 citations). Tomohiro Yoneda has collaborated with scholars based in Japan, United States and Germany. Frequent co-authors include Akiyoshi Uezumi, Masahiko Yamaguchi, Kazutake Tsujikawa, So‐ichiro Fukada, Shin’ichi Takeda, Takahito Ito, Ryo Ogawa, Yuko Miyagoe‐Suzuki, Hiroshi Yamamoto and Kunihiro Tsuchida. Their work appears in journals such as PLoS ONE, Development and Journal of Cell Science.
Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.