Teresa Riesgo
- Hardware and Architecture top 2%
- Embedded Systems Design Techniques 36
- VLSI and Analog Circuit Testing 25
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- Energy Efficient Wireless Sensor Networks 26
- Interconnection Networks and Systems 17
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- Low-power high-performance VLSI design 15
- VLSI and FPGA Design Techniques 14
- Energy Harvesting in Wireless Networks 12
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- Evolutionary Algorithms and Applications 15
- Co-authors
- Jorge PortillaEduardo de la TorreÁngel de CastroA. OteroJ. UcedaGabriel MujicaO. GarcíaP. Zumel
- Cited by
- Hardware and ArchitectureComputer Networks and CommunicationsElectrical and Electronic Engineering
In The Last Decade
Teresa Riesgo
128 papers receiving 1.5k citations
Peers
Comparison fields: 5 of 89
- Hardware and Architecture 447
- Computer Networks and Communications 580
- Electrical and Electronic Engineering 810
- Control and Systems Engineering 213
- Computer Vision and Pattern Recognition 179
Countries citing papers authored by Teresa Riesgo
This map shows the geographic impact of Teresa Riesgo's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Teresa Riesgo with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Teresa Riesgo more than expected).
Fields of papers citing papers by Teresa Riesgo
This network shows the impact of papers produced by Teresa Riesgo. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Teresa Riesgo. The network helps show where Teresa Riesgo may publish in the future.
Co-authorship network
The 25 scholars most cited alongside Teresa Riesgo, linked wherever they have co-authored with each other. Click a name or a connecting line to browse the papers they share.
All Works
| # | Work | ||
|---|---|---|---|
| 1 | 2020 | 5 | |
| 2 | 2018 | 52 | |
| 3 | 2018 | 21 | |
| 4 | 2018 | 1 | |
| 5 | 2015 | 6 | |
| 6 | 2014 | 0 | |
| 7 | A noise-agnostic self-adaptive image processing application based on evolvable hardware | 2013 | 3 |
| 8 | 2012 | 87 | |
| 9 | 2012 | 24 | |
| 10 | 2012 | 11 | |
| 11 | 2008 | 28 | |
| 12 | 2008 | 5 | |
| 13 | Power Macromodeling for High Level Power Estimation. | 2006 | 0 |
| 14 | 2006 | 52 | |
| 15 | 2006 | 13 | |
| 16 | 2006 | 4 | |
| 17 | Flexible Core Reallocation for Virtex II Structures. | 2005 | 3 |
| 18 | 2002 | 1 | |
| 19 | 1998 | 2 | |
| 20 | 1996 | 15 |
About Teresa Riesgo
Teresa Riesgo is a scholar working on Hardware and Architecture, Computer Networks and Communications and Electrical and Electronic Engineering, having authored 135 papers that have together received 1.6k indexed citations. Recurring topics across this work include Embedded Systems Design Techniques (36 papers), Energy Efficient Wireless Sensor Networks (26 papers), VLSI and Analog Circuit Testing (25 papers), Interconnection Networks and Systems (17 papers), Evolutionary Algorithms and Applications (15 papers), Low-power high-performance VLSI design (15 papers), VLSI and FPGA Design Techniques (14 papers) and Energy Harvesting in Wireless Networks (12 papers). The work is most often cited by research in Hardware and Architecture (447 citations), Computer Networks and Communications (580 citations) and Electrical and Electronic Engineering (810 citations). Teresa Riesgo has collaborated with scholars based in Spain, Czechia and Pakistan. Frequent co-authors include Jorge Portilla, Eduardo de la Torre, Ángel de Castro, A. Otero, J. Uceda, Gabriel Mujica, O. García, P. Zumel, Rubén Salvador and Juan J. Gómez-Valverde. Their work appears in journals such as IEEE Transactions on Industrial Electronics, IEEE Transactions on Power Electronics and IEEE Access.
Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.