A. Otero

787 total citations
53 papers, 467 citations indexed

About

A. Otero is a scholar working on Hardware and Architecture, Artificial Intelligence and Computer Networks and Communications. According to data from OpenAlex, A. Otero has authored 53 papers receiving a total of 467 indexed citations (citations by other indexed papers that have themselves been cited), including 26 papers in Hardware and Architecture, 19 papers in Artificial Intelligence and 15 papers in Computer Networks and Communications. Recurrent topics in A. Otero's work include Embedded Systems Design Techniques (20 papers), Evolutionary Algorithms and Applications (13 papers) and Interconnection Networks and Systems (10 papers). A. Otero is often cited by papers focused on Embedded Systems Design Techniques (20 papers), Evolutionary Algorithms and Applications (13 papers) and Interconnection Networks and Systems (10 papers). A. Otero collaborates with scholars based in Spain, Czechia and Germany. A. Otero's co-authors include Eduardo de la Torre, Teresa Riesgo, Jorge Portilla, Rubén Salvador, Lukáš Sekanina, Juan J. Gómez-Valverde, Jose M. Lanza-Gutiérrez, Steffen Peter, Peter Langendörfer and Miguel López and has published in prestigious journals such as IEEE Access, Sensors and Remote Sensing.

In The Last Decade

A. Otero

48 papers receiving 432 citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name h Career Trend Papers Cites
A. Otero Spain 12 177 169 151 148 69 53 467
Cheng-Hung Lin Taiwan 13 182 1.0× 150 0.9× 141 0.9× 130 0.9× 137 2.0× 62 525
Sitao Huang United States 12 137 0.8× 144 0.9× 143 0.9× 108 0.7× 132 1.9× 32 421
M. B. Abdelhalim Egypt 10 110 0.6× 121 0.7× 135 0.9× 86 0.6× 80 1.2× 60 371
Madhura Purnaprajna India 8 66 0.4× 97 0.6× 114 0.8× 107 0.7× 47 0.7× 34 290
Bertil Svensson Sweden 10 118 0.7× 149 0.9× 238 1.6× 224 1.5× 47 0.7× 70 504
Hanqing Zeng United States 11 227 1.3× 206 1.2× 272 1.8× 109 0.7× 228 3.3× 22 554
Zhuangzhi Chen China 10 242 1.4× 35 0.2× 56 0.4× 53 0.4× 61 0.9× 17 424
Richard C. Ho United States 5 104 0.6× 231 1.4× 232 1.5× 57 0.4× 27 0.4× 6 515
Kizheppatt Vipin India 13 102 0.6× 467 2.8× 246 1.6× 350 2.4× 63 0.9× 41 683
Daniel Ziener Germany 17 174 1.0× 415 2.5× 247 1.6× 205 1.4× 86 1.2× 41 605

Countries citing papers authored by A. Otero

Since Specialization
Citations

This map shows the geographic impact of A. Otero's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by A. Otero with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites A. Otero more than expected).

Fields of papers citing papers by A. Otero

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by A. Otero. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by A. Otero. The network helps show where A. Otero may publish in the future.

Co-authorship network of co-authors of A. Otero

This figure shows the co-authorship network connecting the top 25 collaborators of A. Otero. A scholar is included among the top collaborators of A. Otero based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with A. Otero. A. Otero is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
1.
Otero, A., et al.. (2024). Data-driven modeling of reconfigurable multi-accelerator systems under dynamic workloads. Microprocessors and Microsystems. 107. 105050–105050. 1 indexed citations
2.
Otero, A., et al.. (2024). Open-Source Elastic CGRA Generator. 83–86.
3.
4.
5.
Nunez‐Yanez, Jose, A. Otero, & Eduardo de la Torre. (2023). Dynamically reconfigurable variable-precision sparse-dense matrix acceleration in Tensorflow Lite. Microprocessors and Microsystems. 98. 104801–104801. 2 indexed citations
6.
Otero, A., et al.. (2021). Exploiting Hardware-Based Data-Parallel and Multithreading Models for Smart Edge Computing in Reconfigurable FPGAs. IEEE Transactions on Computers. 71(11). 2903–2914. 1 indexed citations
7.
López, Sebastián, et al.. (2020). Lossy Hyperspectral Image Compression on a Reconfigurable and Fault-Tolerant FPGA-Based Adaptive Computing Platform. Electronics. 9(10). 1576–1576. 8 indexed citations
8.
Otero, A., et al.. (2020). Run-Time Reconfigurable MPSoC-Based On-Board Processor for Vision-Based Space Navigation. IEEE Access. 8. 59891–59905. 18 indexed citations
9.
Otero, A., et al.. (2020). Exploiting Multi-Level Parallelism for Run-Time Adaptive Inverse Kinematics on Heterogeneous MPSoCs. IEEE Access. 8. 118707–118724. 7 indexed citations
10.
Otero, A., et al.. (2019). Automated Tool and Runtime Support for Fine-Grain Reconfiguration in Highly Flexible Reconfigurable Systems. UPM Digital Archive (Technical University of Madrid). 307–307. 2 indexed citations
11.
Guerra, Raúl, et al.. (2018). A Runtime-Scalable and Hardware-Accelerated Approach to On-Board Linear Unmixing of Hyperspectral Images. Remote Sensing. 10(11). 1790–1790. 2 indexed citations
12.
Gómez-Valverde, Juan J., et al.. (2018). FPGA-Based High-Performance Embedded Systems for Adaptive Edge Computing in Cyber-Physical Systems: The ARTICo3 Framework. Sensors. 18(6). 1877–1877. 52 indexed citations
13.
14.
Otero, A., et al.. (2015). Fast and compact evolvable systolic arrays on dynamically reconfigurable FPGAs. UPM Digital Archive (Technical University of Madrid). 2. 1–7. 6 indexed citations
15.
Otero, A., et al.. (2013). A noise-agnostic self-adaptive image processing application based on evolvable hardware. 351–352. 3 indexed citations
16.
Otero, A., et al.. (2013). A Novel FPGA-based Evolvable Hardware System Based on Multiple Processing Arrays. Archivo Digital UPM (Universidad Politécnica de Madrid). 5. 182–191. 7 indexed citations
17.
Otero, A., Sebastián López, Eduardo de la Torre, et al.. (2013). A scalable H.264/AVC deblocking filter architecture. Journal of Real-Time Image Processing. 12(1). 81–105. 2 indexed citations
18.
Gómez-Valverde, Juan J., A. Otero, Miguel López, et al.. (2012). Using SRAM Based FPGAs for Power-Aware High Performance Wireless Sensor Networks. Sensors. 12(3). 2667–2692. 32 indexed citations
19.
Salvador, Rubén, et al.. (2012). Implementation techniques for evolvable HW systems: virtual VS. dynamic reconfiguration. Archivo Digital UPM (Universidad Politécnica de Madrid). 547–550. 8 indexed citations
20.
Otero, A., et al.. (2002). 4:1 Multiplexer and 1:4 Demultiplexer Chipset for Data Rates up to 50 Gb/s in SiGe Technology. European Conference on Optical Communication. 3. 1–2. 4 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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