Takahiro Irita

508 total citations
32 papers, 280 citations indexed

About

Takahiro Irita is a scholar working on Electrical and Electronic Engineering, Hardware and Architecture and Computer Networks and Communications. According to data from OpenAlex, Takahiro Irita has authored 32 papers receiving a total of 280 indexed citations (citations by other indexed papers that have themselves been cited), including 19 papers in Electrical and Electronic Engineering, 15 papers in Hardware and Architecture and 8 papers in Computer Networks and Communications. Recurrent topics in Takahiro Irita's work include Low-power high-performance VLSI design (10 papers), Embedded Systems Design Techniques (9 papers) and Advancements in PLL and VCO Technologies (7 papers). Takahiro Irita is often cited by papers focused on Low-power high-performance VLSI design (10 papers), Embedded Systems Design Techniques (9 papers) and Advancements in PLL and VCO Technologies (7 papers). Takahiro Irita collaborates with scholars based in Japan and United States. Takahiro Irita's co-authors include Toshihiro Hattori, Hiroyuki Mizuno, Naohiko Irie, Shinichi Yoshioka, Kenzo Hirose, Yasuhisa Shimazaki, T. Kamei, Kazumasa Yanagisawa, Yuichi Shimazaki and Kei Hirose and has published in prestigious journals such as IEEE Journal of Solid-State Circuits, Japanese Journal of Applied Physics and IEEE Micro.

In The Last Decade

Takahiro Irita

32 papers receiving 271 citations

Peers

Countries citing papers authored by Takahiro Irita

Since Specialization

Citations

This map shows the geographic impact of Takahiro Irita's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Takahiro Irita with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Takahiro Irita more than expected).

Fields of papers citing papers by Takahiro Irita

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Takahiro Irita. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Takahiro Irita. The network helps show where Takahiro Irita may publish in the future.

Co-authorship network of co-authors of Takahiro Irita

This figure shows the co-authorship network connecting the top 25 collaborators of Takahiro Irita. A scholar is included among the top collaborators of Takahiro Irita based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Takahiro Irita. Takahiro Irita is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

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20 of 20 papers shown

#	Work	Indexed citations
1	4.2 A 12nm Autonomous-Driving Processor with 60.4TOPS, 13.8TOPS/W CNN Executed by Task-Separated ASIL D Control 2021 ·(unknown), (unknown), (unknown), Atsushi Nakamura, (unknown), (unknown), (unknown), (unknown), Takahiro Irita, (unknown), (unknown), T. Kamei	12
2	A 16nm FinFET Heterogeneous Nona-Core SoC Supporting Functional Safety Standard ISO26262 ASIL B 2016 ·IEICE Technical Report; IEICE Tech. Rep. ·(unknown), (unknown), (unknown), Jun Matsushima, (unknown), Yasuhisa Shimazaki, (unknown), Takahiro Irita	1
3	A 16 nm FinFET Heterogeneous Nona-Core SoC Supporting ISO26262 ASIL B Standard 2016 ·IEEE Journal of Solid-State Circuits ·(unknown), (unknown), (unknown), (unknown), Takahiro Irita, (unknown), Yasuhisa Shimazaki, (unknown)	5
4	4.5 A 16nm FinFET heterogeneous nona-core SoC complying with ISO26262 ASIL-B: Achieving 10−7 random hardware failures per hour reliability 2016 ·(unknown), (unknown), (unknown), (unknown), (unknown), Yasuhisa Shimazaki, (unknown), Takahiro Irita	16
5	A 28nm High-κ metal-gate single-chip communications processor with 1.5GHz dual-core application processor and LTE/HSPA+-capable baseband processor 2013 ·(unknown), (unknown), T. Koike, Takahiro Irita, (unknown), (unknown), (unknown), (unknown), Akira Fukuda, (unknown), (unknown), Noriaki Maeda, Koji Nii, Takeshi Kataoka, Toshihiro Hattori	10
6	A 65nm dual-mode baseband and multimedia application processor SoC with advanced power and memory management 2009 ·Asia and South Pacific Design Automation Conference ·T. Kamei, (unknown), (unknown), Masayuki Itô, Takahiro Irita, (unknown), Toshihiro Hattori, (unknown)	2
7	A 65 nm Single-Chip Application and Dual-Mode Baseband Processor With Partial Clock Activation and IP-MMU 2009 ·IEEE Journal of Solid-State Circuits ·Masayuki Itô, (unknown), K. Ohno, (unknown), (unknown), (unknown), Takahiro Irita, (unknown), T. Kamei, (unknown), (unknown), (unknown), (unknown)	8
8	A 65nm dual-mode baseband and multimedia application processor SoC with advanced power and memory management 2009 ·T. Kamei, Tetsuhiro Yamada, Takao Koike, Masayuki Itô, Takahiro Irita, Kenichi Nitta, Toshihiro Hattori, (unknown)	1
9	A 65nm Single-Chip Application and Dual-Mode Baseband Processor with Partial Clock Activation and IP-MMU 2008 ·(unknown), T. Kamei, (unknown), Takahiro Irita, (unknown), Takao Koike, Shinichi Yoshioka, K. Ohno, (unknown), (unknown), (unknown), Yuji Arai, (unknown)	16
10	A 390MHz Single-Chip Application and Dual-Mode Baseband Processor in 90nm Triple-Vt CMOS 2007 ·Masayuki Itô, Toshihiro Hattori, Takahiro Irita, (unknown), Fumiaki Tanaka, (unknown), Shinichi Yoshioka, K. Ohno, (unknown), (unknown), (unknown), Yuji Arai	15
11	Hierarchical Power Distribution With Power Tree in Dozens of Power Domains for 90-nm Low-Power Multi-CPU SoCs 2007 ·IEEE Journal of Solid-State Circuits ·(unknown), Hiroyuki Mizuno, (unknown), Kei Hirose, Yasuhisa Shimazaki, (unknown), (unknown), (unknown), Tetsuya Yamada, Takahiro Irita, Toshihiro Hattori, Kazumasa Yanagisawa, Naohiko Irie	31
12	Hierarchical Power Distribution with 20 Power Domains in 90-nm Low-Power Multi-CPU Processor 2007 ·(unknown), Hiroyuki Mizuno, (unknown), Kei Hirose, Yasuhisa Shimazaki, (unknown), (unknown), (unknown), Tetsuya Yamada, Takahiro Irita, Toshihiro Hattori, Kazumasa Yanagisawa, Naohiko Irie	3
13	In-Situ Measurement of Supply-Noise Maps With Millivolt Accuracy and Nanosecond-Order Time Resolution 2007 ·IEEE Journal of Solid-State Circuits ·Yusuke Kanno, (unknown), Takahiro Irita, Kei Hirose, (unknown), (unknown), (unknown), Hiroyuki Mizuno	12
14	In-Situ Measurement of Supply-Noise Maps with Millivolt Accuracy and Nanosecond-Order Time Resolution 2006 ·(unknown), (unknown), Takahiro Irita, Kenzo Hirose, (unknown), (unknown), Setsuko Komatsu, Hiroyuki Mizuno	11
15	A resume-standby application processor for 3G cellular phones 2004 ·T. Kamei, Masatoshi Ishikawa, (unknown), Takahiro Irita, Minoru Abe, (unknown), (unknown), (unknown), (unknown), S. Tamaki, (unknown), Yuichi Shimazaki, (unknown), Hiroyuki Mizuno, Naohiko Irie, (unknown), (unknown), Kenzo Hirose, Shinichi Yoshioka, Toshihiro Hattori	27
16	A 133 MHz 170 mW 10 μA standby application processor for 3G cellular phones 2003 ·2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315) ·(unknown), (unknown), (unknown), (unknown), (unknown), (unknown), (unknown), Takahiro Irita, S. Tamaki, Hideshi Yagi, (unknown), Kenji Ogura, Hikaru Watanabe, (unknown), Kenzo Hirose, (unknown), Toshihiro Hattori, Isao Kudo, (unknown), (unknown)	10
17	A Low-Power Embedded RISC Microprocessor with an Integrated DSP for Mobile Applications 2002 ·IEICE Transactions on Electronics ·(unknown), Makoto Ishikawa, (unknown), (unknown), Takahiro Irita, (unknown), (unknown), T. Kamei, (unknown), (unknown), (unknown), Toshihiro Hattori, Kunio Uchiyama	5
18	Self-oscillating chaos generator using CMOS multivibrator 2002 ·(unknown), Takahiro Irita, Minoru Fujishima, (unknown)	2
19	A simple chaos-generator for neuron element utilizing capacitance–npn-transistor pair 1998 ·Computers & Electrical Engineering ·Takahiro Irita, (unknown), Minoru Fujishima, (unknown)	2
20	Physical Mechanism of Chaos in Thyristors and Coupled-Transistor Structures 1995 ·Japanese Journal of Applied Physics ·Takahiro Irita, (unknown), Minoru Fujishima, (unknown)	3

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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