Shobha Vasudevan
- Hardware and Architecture top 2%
- Electrical and Electronic Engineering
- Software top 2%
- Computational Theory and Mathematics top 2%
- Artificial Intelligence top 10%
- Co-authors
- Jacob A. AbrahamLingyi LiuSanjay J. PatelDavid TchengDavid SheridanDebjit PalChen-Hsuan LinRui Jiang
- Topics
- VLSI and Analog Circuit Testing (32 papers)Formal Methods in Verification (27 papers)Software Testing and Debugging Techniques (24 papers)
- Journals
- Cell ReportsIEEE Transactions on ComputersIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
- Partner nations
- United StatesUnited KingdomMexico
In The Last Decade
Shobha Vasudevan
52 papers receiving 635 citations
Peers
Comparison fields: 5 of 28
- Hardware and Architecture 382
- Electrical and Electronic Engineering 292
- Software 277
- Computational Theory and Mathematics 267
- Artificial Intelligence 113
Countries citing papers authored by Shobha Vasudevan
This map shows the geographic impact of Shobha Vasudevan's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Shobha Vasudevan with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Shobha Vasudevan more than expected).
Fields of papers citing papers by Shobha Vasudevan
This network shows the impact of papers produced by Shobha Vasudevan. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Shobha Vasudevan. The network helps show where Shobha Vasudevan may publish in the future.
Co-authorship network of co-authors of Shobha Vasudevan
This figure shows the co-authorship network connecting the top 25 collaborators of Shobha Vasudevan. A scholar is included among the top collaborators of Shobha Vasudevan based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Shobha Vasudevan. Shobha Vasudevan is excluded from the visualization to improve readability, since they are connected to all nodes in the network.
All Works
| # | Work | Indexed citations |
|---|---|---|
| 1 | 0 | |
| 2 | 0 | |
| 3 | Learning Semantic Representations to Verify Hardware Designs | 6 |
| 4 | 2 | |
| 5 | 5 | |
| 6 | 2 | |
| 7 | 6 | |
| 8 | 3 | |
| 9 | 5 | |
| 10 | 15 | |
| 11 | 11 | |
| 12 | 5 | |
| 13 | 15 | |
| 14 | 1 | |
| 15 | 4 | |
| 16 | 71 | |
| 17 | 9 | |
| 18 | 12 | |
| 19 | 39 | |
| 20 | 39 |
About Shobha Vasudevan
Shobha Vasudevan is a scholar working on Software, Hardware and Architecture and Computational Theory and Mathematics, having authored 58 papers that have together received 652 indexed citations. Recurring topics across this work include VLSI and Analog Circuit Testing (32 papers), Formal Methods in Verification (27 papers) and Software Testing and Debugging Techniques (24 papers). The work is most often cited by research in Software (277 citations), Hardware and Architecture (382 citations) and Computational Theory and Mathematics (267 citations). Shobha Vasudevan has collaborated with scholars based in United States, United Kingdom and Mexico. Frequent co-authors include Jacob A. Abraham, Lingyi Liu, Sanjay J. Patel, David Tcheng, David Sheridan, Debjit Pal, Chen-Hsuan Lin, Rui Jiang, E. Allen Emerson and Elyse Rosenbaum. Their work appears in journals such as Cell Reports, IEEE Transactions on Computers and IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.
Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.