S. Ramesh

1.9k total citations
119 papers, 1.1k citations indexed

About

S. Ramesh is a scholar working on Computational Theory and Mathematics, Hardware and Architecture and Software. According to data from OpenAlex, S. Ramesh has authored 119 papers receiving a total of 1.1k indexed citations (citations by other indexed papers that have themselves been cited), including 84 papers in Computational Theory and Mathematics, 55 papers in Hardware and Architecture and 54 papers in Software. Recurrent topics in S. Ramesh's work include Formal Methods in Verification (81 papers), Software Testing and Debugging Techniques (40 papers) and Embedded Systems Design Techniques (34 papers). S. Ramesh is often cited by papers focused on Formal Methods in Verification (81 papers), Software Testing and Debugging Techniques (40 papers) and Embedded Systems Design Techniques (34 papers). S. Ramesh collaborates with scholars based in India, United States and Australia. S. Ramesh's co-authors include Mangala Gowri Nanda, Arcot Sowmya, Manoranjan Satpathy, K. C. Shashidhar, Vijay D’Silva, R. K. Shyamasundar, Swarup Kumar Mohalik, Gérard Berry, Samarjit Chakraborty and Rajeev Alur and has published in prestigious journals such as SHILAP Revista de lepidopterología, Proceedings of the IEEE and IEEE Transactions on Software Engineering.

In The Last Decade

S. Ramesh

112 papers receiving 978 citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name	h						Papers	Cites
S. Ramesh India	17	468	432	430	246	221	119	1.1k
Guillaume Brat United States	13	651 1.4×	238 0.6×	978 2.3×	533 2.2×	261 1.2×	46	1.5k
Michel Reniers Netherlands	18	864 1.8×	253 0.6×	250 0.6×	488 2.0×	173 0.8×	141	1.2k
Marjan Sirjani Iran	17	434 0.9×	222 0.5×	281 0.7×	456 1.9×	306 1.4×	102	940
Angelo Morzenti Italy	16	691 1.5×	242 0.6×	500 1.2×	451 1.8×	128 0.6×	69	1.0k
Ingolf H. Krüger United States	14	151 0.3×	213 0.5×	264 0.6×	577 2.3×	229 1.0×	57	963
Steve Vestal United States	14	336 0.7×	761 1.8×	131 0.3×	236 1.0×	445 2.0×	34	1.0k
Bruno Dutertre United States	15	298 0.6×	191 0.4×	211 0.5×	379 1.5×	417 1.9×	43	903
Christian Schallhart United Kingdom	13	469 1.0×	143 0.3×	393 0.9×	547 2.2×	313 1.4×	38	1.1k
Jean-Raymond Abrial Switzerland	14	868 1.9×	260 0.6×	637 1.5×	802 3.3×	376 1.7×	26	1.5k
Shengchao Qin United Kingdom	17	337 0.7×	195 0.5×	314 0.7×	443 1.8×	194 0.9×	97	909

Countries citing papers authored by S. Ramesh

Since Specialization

Citations

This map shows the geographic impact of S. Ramesh's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by S. Ramesh with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites S. Ramesh more than expected).

Fields of papers citing papers by S. Ramesh

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by S. Ramesh. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by S. Ramesh. The network helps show where S. Ramesh may publish in the future.

Co-authorship network of co-authors of S. Ramesh

This figure shows the co-authorship network connecting the top 25 collaborators of S. Ramesh. A scholar is included among the top collaborators of S. Ramesh based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with S. Ramesh. S. Ramesh is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

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20 of 20 papers shown

Ramesh, S., Svilen Kanev, Gilles Pokam, et al.. (2025). Correct Wrong Path. IEEE Computer Architecture Letters. 24(2). 221–224.

Ramesh, S., et al.. (2023). Applying declarative analysis to industrial automotive software product line models. Empirical Software Engineering. 28(2). 2 indexed citations

Ramesh, S.. (2022). Risk Management and Legal Liability: Mitigating Business Risks in the Corporate Environment. 29–33. 1 indexed citations

Satpathy, Manoranjan, et al.. (2018). Formal Modeling and Verification of Controllers for a Family of DRAM Caches. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 37(11). 2485–2496. 4 indexed citations

Ramesh, S., et al.. (2014). Translation Validation for Stateflow to C. 1–6. 5 indexed citations

Ramesh, S., et al.. (2013). Time-budgeting: a component based development methodology for real-time embedded systems. Formal Aspects of Computing. 26(3). 591–621. 6 indexed citations

Mohalik, Swarup Kumar, et al.. (2012). Verifying timing synchronization constraints in distributed embedded architectures. Design, Automation, and Test in Europe. 200–205. 1 indexed citations

Satpathy, Manoranjan, et al.. (2012). An integrated test generation tool for enhanced coverage of simulink/stateflow models. Design, Automation, and Test in Europe. 308–311. 16 indexed citations

Mohalik, Swarup Kumar, et al.. (2012). Verifying timing synchronization constraints in distributed embedded architectures. 5. 200–205. 4 indexed citations

10.

Shashidhar, K. C., et al.. (2008). Verification of Model Processing Tools<xref ref-type="fn" rid="FN1">*</xref>. SAE International journal of passenger cars. Electronic and electrical systems. 1(1). 45–52. 2 indexed citations

11.

Ramesh, S., et al.. (2007). Next Generation Design and Verification Methodologies for Distributed Embedded Control Systems: Proceedings of the GM R&D Workshop, Bangalore, India, January 2007. Springer eBooks. 1 indexed citations

12.

Ramesh, S., et al.. (2007). Testing Model-Processing Tools for Embedded Systems. 203–214. 12 indexed citations

13.

D’Silva, Vijay, S. Ramesh, & Arcot Sowmya. (2004). Synchronous protocol automata: a framework for modelling and verification of SoC communication architectures. Design, Automation, and Test in Europe. 1. 10390. 28 indexed citations

14.

Nanda, Mangala Gowri & S. Ramesh. (2003). Pointer analysis of multithreaded Java programs. DSpace (IIT Bombay). 1068–1075. 8 indexed citations

15.

Ramesh, S., et al.. (2002). Functional Verification of System on Chips-Practices, Issues and Challenges. Asia and South Pacific Design Automation Conference. 11–13. 5 indexed citations

16.

Ramesh, S., et al.. (1996). A direct characterization of completion. Theoretical Computer Science. 154(2). 379–385. 1 indexed citations

17.

Hooman, Jozef, S. Ramesh, & Willem P. de Roever. (1992). A compositional axiomatization of Statecharts. Theoretical Computer Science. 101(2). 289–335. 27 indexed citations

18.

Ramesh, S.. (1989). Algebraic specification and implementation of infinite processes. TU/e Research Portal (Eindhoven University of Technology). 8911. 4 indexed citations

19.

Ramesh, S., et al.. (1989). A compositional semantics for Statecharts. Centrum Wiskunde & Informatica (CWI), the national research institute for mathematics and computer science in the Netherlands. 275–287. 12 indexed citations

20.

Ramesh, S.. (1987). A new efficient implementation of CSP with output guards. Data Archiving and Networked Services (DANS). 266–273. 7 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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